Vendor: Nextera Video Category: IEEE-1588 / PTP

Time Synchronization over Internet Protocol

The ST 2059 core is an FPGA IP core that generates timing and clock signals according to the SMPTE ST 2059 standard defined by th…

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Overview

The ST 2059 core is an FPGA IP core that generates timing and clock signals according to the SMPTE ST 2059 standard defined by the Society of Motion Picture and Television Engineers. These deterministic timing signals can be used to time synchronize audio and video systems to a SMPTE ST2059 (PTP) grandmaster.

The IP core provides broadcast and professional AV equipment the ability to support deterministic generation of timing (signals) for video and audio systems. Audio/visual systems are generally synchronized, locked to the same time base with a relative phase with respect to a master time generator. This makes seamless switching between cameras or mixing a presenter in front of weather graphics possible. The same can be true for audio devices.

The Adeas AIP-ST2059 core uses the IEEE 1588 Precision Time Protocol (PTP) to provide time-aligned signal generation, thus permitting the interoperable use of IP-based media equipment with conventional genlocked SDI equipment.

Based on standard AXI4-Stream, AXI4-Lite and AXI4MM interfaces, the AIP-ST2059 core can easily be integrated into your system design.

Key features

  • Supports timing and synchronization according to SMPTE ST 2059-1 and ST 2059-2.
  • Generation of SMPTE ST12-1 Time Code.
  • Implementation is successfully tested during interoperability testing.
  • The core is network speed independent.

Block Diagram

ST 2059 PTP Core block diagram

What’s Included?

  • Available reference designs
    • Based on Xilinx KC705 and KCU105 development kits.
    • Supports 1Gb and 10Gb Ethernet networks.
    • Generates SDI black frame output and DARS (AES3) output synchronised to the grandmaster.
  • Available documentations
    • Product guide.
    • Application note
  • Available licenses
    • Time limited Evaluation license
    • Project license
    • Site license
    • Worldwide license

Specifications

Identity

Part Number
ST 2059 PTP Core
Vendor
Nextera Video
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Nextera Video
HQ: USA
Nextera’s goal is to solve challenging problems by developing premium products and solutions for media professionals. Our approach to designing products starts by evaluating the core of real world problems and developing products that are well designed, feature rich, intuitive, and affordable. The migration to Video over IP is upon us and we are here to ease that transition with an array of solutions, including our Video over IP cores and VIDIO FMC development module. Our VIDIO development module was created specifically to provide an affordable and effective platform on which to develop new 4K and Video over IP products. We also offer a variety FPGA IP cores supporting the SMPTE ST 2110 and ST 2059 Video over IP standards along with software cores for auto detection and switching of IP signals following the AMWA NMOS specification. We also offer cores for scaling, de-interlacing, noise reduction, image enhancement, frame rate conversion, etc. in both fixed function and running on our programmable video processor core.
Contact Nextera Video

Learn more about IEEE-1588 / PTP IP core

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Frequently asked questions about Time Synchronization IP cores

What is Time Synchronization over Internet Protocol?

Time Synchronization over Internet Protocol is a IEEE-1588 / PTP IP core from Nextera Video listed on Semi IP Hub.

How should engineers evaluate this IEEE-1588 / PTP?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this IEEE-1588 / PTP IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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