Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Clock Generator

SMIC 0.18um Clock Slicer

Present IP (clock slicer) is to re-shape the sinusoidal clock signal to a proper CMOS signal before its delivery to digital logic.

Contact Provider Request Datasheet
SMIC 180nm G View all specifications

Overview

Present IP (clock slicer) is to re-shape the sinusoidal clock signal to a proper CMOS signal before its delivery to digital logic.

Key features

  • Process: SMIC 0.18um 1P4M CMOS process
  • Supply voltage: 1.8v+/-10%
  • Operation frequency: 26MHz
  • Current: ~500uA typically
  • Operating temperature: - 40c ~ +25c ~ +85c

Silicon Options

Foundry Node Process Maturity
SMIC 180nm G —

Specifications

Identity

Part Number
SMIC18_CLOCKSLICER_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.

Provider

VeriSilicon Microelectronics (Shanghai) Co., Ltd.
HQ: USA
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is committed to providing customers with platform-based, all-round, one-stop custom silicon services and semiconductor IP licensing services leveraging its in-house semiconductor IP. Under the unique "Silicon Platform as a Service" (SiPaaS) business model, depending on the comprehensive IP portfolio, VeriSilicon can create silicon products from definition to test and package in a short period of time, and provides high performance and cost-efficient semiconductor alternative products for fabless, IDM, system vendors (OEM/ODM), large internet companies and cloud service provider, etc. VeriSilicon's business covers consumer electronics, automotive electronics, computer and peripheral, industry, data processing, Internet of Things (IoT) and other applications. VeriSilicon presents a variety of customized silicon solutions, including high-definition video, high-definition audio and voice, in-vehicle infotainment, video surveillance, IoT connectivity, smart wearable, high-end application processor, video transcoding acceleration and intelligent pixel processing, etc. In addition, VeriSilicon has six types of in-house processor IPs, namely GPU IP, NPU IP, VPU IP, DSP IP, ISP IP and Display Processor IP, as well as more than 1,400 analog and mixed signal IPs and RF IPs. Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 7 design and R&D centers in China and the United States, as well as 11 sales and customer service offices worldwide. VeriSilicon currently has more than 1,200 employees.
Contact VeriSilicon Microelectronics (Shanghai) Co., Ltd.

Learn more about Clock Generator IP core

Generating multiple clock frequencies using Specman "real" feature in mixed (Analog/Digital) design environments

Using our “Specman agent approach for the Mixed Verification” along with exploiting “real” feature of Specman version 8.2, we can introduce directed/constrained randomization to the frequencies needed for the analog modules which are interacting with the DUT (Design Under Test). This approach gives complete controllability over the clock frequencies, which can be directly randomized and modified on-the-fly from the testcase, as the scenario may demand.

M31 on the Specification and Development of MIPI Physical Layer

MIPI is the abbreviation of "Mobile Industry Processor Interface". This article will introduce the physical layer specifications of MIPI architecture, and explain the features and benefits of D-PHY and C-PHY respectively. Then, the MIPI perspective on the development and challenges of automotive electronics and the professional MIPI technical services that M31 can provide will be shared.

Silicon-Accurate Fractional-N PLL Design

Fractional-N PLLs are a useful class of PLLs and not well understood. This paper explains in simple terms how these differ from a regular integer PLL. Common applications are listed along with a brief description of the key performance parameter – jitter.

FPGA Implementation of DLX Microprocessor With WISHBONE SoC Bus

DLX is an open source microprocessor, it’s free and it has never been implemented in a commercial ASIC (Application Specific Integrated Circuit) design. The objective of this project is to use the DLX microprocessor implemented with Wishbone bus interface for a SoC (System-on-Chip) design.

Mixed Signal Drivers for Ultra Low Power and Very High Power Applications

Evolving niche markets, such as ICs for biomedical applications, are very challenging in respect to power consumption and on chip power dissipation, namely, wide range from ultra low power (ULP) functionality (<uW) where IC is battery powered, e.g. mobile micro transducers, to very high power (VHP, >5W), e.g. coded energy transfer from RFID¡¯s for remote sensing and animal tracking.

Frequently asked questions about Clock Generator IP cores

What is SMIC 0.18um Clock Slicer?

SMIC 0.18um Clock Slicer is a Clock Generator IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Clock Generator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Clock Generator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP