Vendor: NTLab Category: Clock Generator

Programmable 5-bit CMOS low-frequency divider

The programmable CMOS low-frequency divider configuration of asynchronous programmable impulse counter, control logic and output …

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TSMC 180nm BCDG2 Silicon Proven View all specifications

Overview

The programmable CMOS low-frequency divider configuration of asynchronous programmable impulse counter, control logic and output buffer.
The block is fabricated on TSMC SiGe BiCMOS 0.18 um.

Key features

  • TSMC SiGe BiCMOS 0.18 um
  • Range of division ratio from 1 to 31
  • Low current consumption 10 uA
  • Portable to other technologies (upon request)

Block Diagram

180TSMC_RDIV_03 block diagram

Applications

  • PLL frequency synthesizer

What’s Included?

  • Schematic or NetList
  • Abstract view (.lef and .lib files)
  • Layout (optional)
  • Verilog behavior model
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
TSMC 180nm BCDG2 Silicon Proven

Specifications

Identity

Part Number
180TSMC_RDIV_03
Vendor
NTLab

Provider

NTLab
HQ: Lithuania
NTLab is a vertically integrated microelectronics design center. It has 70+ experienced and qualified engineers. NTLab specializes in the designing of mixed-signal and RF ICs and Systems-on-Chip. It has a wide range of own silicon-verified IP blocks: processor cores, interfaces, analog and high-frequency PHYs, etc., thus allowing customized design to be fast and predictable. In-company unique combination of competences in digital, analog and RF circuits and embedded software enables NTLab to participate in the projects that require deep research and utilize most sophisticated and advanced techniques: multi-system GPS/GLONASS/Galileo/BeiDou/NavIC(IRNSS)/QZSS/SBAS navigation, RF ID, wireless communications, etc. All designed ICs are provided with test and development tools, as well as with reference software. NTLab offers a wide range of silicon proven analog/mixed-signal IPs in 0.35µm, 0.25 µm, 0.18 µm, 0.13 µm, 0.09 µm, 65nm, 55nm, 40nm, 28nm, 22 nm CMOS and SiGe BiCMOS processes. These IPs are suitable for devices targeted both consumer and industrial markets. Most of these IPs have been proven in silicon on the foundries: Samsung, UMC, GlobalFoundries, SMIC, VIS, Tower, X-FAB, iHP, AMS, SilTerra, STMicroelectronics, Winfoundry.
Contact NTLab

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Frequently asked questions about Clock Generator IP cores

What is Programmable 5-bit CMOS low-frequency divider?

Programmable 5-bit CMOS low-frequency divider is a Clock Generator IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Clock Generator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Clock Generator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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