Vendor: Synopsys, Inc. Category: Single-Protocol PHY

SATA 6G PHY in GF (40nm, 28nm)

The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…

Contact Provider Request Datasheet
GlobalFoundries 28nm Available on request View all specifications

Overview

The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interface to mass storage. The complete, integrated solution is silicon-proven and includes a comprehensive suite of configurable digital controllers, high-speed mixed-
signal PHYs, and verification IP. By providing a complete solution from a single IP vendor, Synopsys lowers integration risk by ensuring that all the IP functions work together seamlessly. Synopsys IP for SATA provides designers with a high-performance IP solution that is extremely low in power, area, and latency. The IP has gone through extensive in-house and third-party interoperability testing with products shipping in volume production. As a leading supplier of SATA IP, Synopsys is focused on delivering high-quality IP. The strict quality measures, combined with an expert technical support team, enable designers to accelerate time-to-market and reduce integration risk for next-generation mass storage applications.

Key features

  • Compliant with SATA/eSATA v3.3, AHCI v1.3 and SATA PIPE v4.3 specifications
  • AMBA 2.0 AHB and AMBA 3 AXI subsystem interfaces
  • AMBA 4 AXI and ACE-Lite bus interfaces
  • Memory data protection and memory address parity protection
  • Supports ATA/TAPI-7 specification
  • Supports power management features
  • Supports BIST loop-back modes
  • Supports up to 8 SATA devices per controller (configurable from 1 to 8 ports)
  • Native command queuing, streaming, and asynchronous notification
  • Port multiplier support with both command-based switch (CBS) and FIS-based switching (FBS)
  • Optional mechanical presence switch, cold presence detect, and activity LED support
  • Runs latest version of Windows or Linux AHCI software drivers “out of box”

Benefits

  • Complete solution: Digital Controllers, PHY, and Verification IP
  • Compliant with SATA/eSATA v3.3 and AHCI v1.3 specifications
  • Compliant with SATA PIPE v4.3 specification
  • Silicon-proven, shipping in volume
  • Configurable ARM® AMBA®, AHB/AXI bus interfaces
  • PHY optimized for low area and low power
  • Controllers validated with Synopsys and third-party PHYs
  • PHY and controller IP supports 1.5, 3 & 6 Gbps SATA operations
  • Advanced built-in diagnostics for at-speed production testing

Applications

  • Set-top box, DVD and digital TV
  • Desktop and laptop
  • Portable and network storage
  • Hard disk, optical disk, flash, and solid state drives
  • Enterprise and RAID storage systems
  • Any system requiring a high-speed SATA host or device interface

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 28nm 28 280 nm Available on request

Specifications

Identity

Part Number
dwc_sata6gphy_gf
Vendor
Synopsys, Inc.

Provider

Synopsys, Inc.
HQ: USA
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
Contact Synopsys, Inc.

Learn more about Single-Protocol PHY IP core

UFS Goes Mainstream

UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.

Design IP Faster: Introducing the C~ High-Level Language

In this paper, we introduce a new high-level, dataflow programming language called C~ (“C flow”) that further increases productivity by raising the level of abstraction from behavioral descriptions, while overcoming the limitations of C for hardware design. We present the syntax and semantics of this language, and the framework that provides hardware and software code generation. This paper illustrates the benefits of using C~ for hardware design of a IEEE 802.3 MAC, synthesized for FPGA and for 90nm CMOS technology.

Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Can MIPI and MDDI Co-Exist?

Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?

Frequently asked questions about Single-Protocol PHY IP

What is SATA 6G PHY in GF (40nm, 28nm)?

SATA 6G PHY in GF (40nm, 28nm) is a Single-Protocol PHY IP core from Synopsys, Inc. listed on Semi IP Hub. It is listed with support for globalfoundries Available on request.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP