Memory interface IP cores connect processing subsystems to external or embedded memory devices. They include memory controllers, PHYs, controller-plus-PHY subsystems, and interface solutions for DRAM, flash, and high-bandwidth memory technologies.
Browse memory interface IP for DDR, LPDDR, GDDR, HBM, NAND Flash, and NOR Flash with features such as protocol compliance, timing management, ECC, training, low latency, high bandwidth, and process-node optimized PHY integration.
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
VBO TX and RX PHY & Controller
The VBO IP is designed for transmitting or receiving video signals between a video source device and display device, which is ful…
LPDDR5X/5/4X/4 combo PHY at 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integrati…
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integrati…
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integrati…
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
Features a mixed-signal architecture that addresses the challenges of DRAM integration in high-performance and low-power environm…
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
High Performance DDR 3/2 Memory Controller IP
This memory controller supports DDR2/3 SDRAM.
DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency.
Delivers excellent performance in addition to high utilization and ultra-low latency, achieved by its proprietary out-of-scheduli…
DDR 4/3 Memory Controller IP - 2400MHz
This memory controller supports DDR3/4 SDRAM.
The GDDR6 controller core is designed for use in applications requiring high memory throughput including graphics, driver assista…
NAND Host Controller provides an easy interface to access NAND Flash Memory devices.
Rambus offers the industry’s fastest HBM4E Controller IP core designed to support customers with deploying a new generation of HB…
Low Latency DRAM Synthesizable Transactor
Low Latency DRAM Synthesizable Transactor provides a smart way to verify the Low Latency DRAM component of a SOC or a ASIC in Emu…
High-Performance SPI Master/Slave with HyperBus™ & xSPI Support The HyperBus™ Memory Controller IP Core is a high-speed, fully co…
The GDDR7 controller IP core is designed for use in applications requiring high memory throughput including artificial intelligen…
The HBM4 Verification IP provides an effective & efficient way to verify the components interfacing with HBM interface of an ASIC…