Vendor: Digital Blocks, Inc. Category: I2C / I3C

I3C Controller IP- Slave, Parameterized FIFO, APB Bus

The DB-I3C-S-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – I…

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Overview

The DB-I3C-S-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improved Inter Integrated Circuit specification.

The I3C is a two-wire bidirectional interface standard (SCL is Clock, SDA is Data) for transfer of bytes of information between two or more compliant I3C devices as well as legacy I2C Slave devices.

The DB-I3C-S-APB is an I3C Slave Controller supporting I3C SDR / Broadcast / Direct Messages, Legacy I2C Message, and I3C HDR Mode (optionally).

In an ASIC / ASSP / FPGA integrated circuit, typically, the microprocessor is an ARM, MIPS, or RISC-V processor, but can be any embedded processor. Figure 1 depicts the system view of the DB-I3C-S-APB Controller IP Core embedded within an integrated circuit device with its Microprocessor Configuration.

Key features

  • The DB-I3C-S-APB is available in synthesizable RTL Verilog and a technology-specific netlist for FPGAs, along with Synopsys Design Constraints, a simulation test bench with expected results, datasheet, and user manual.

Block Diagram

DB-I3C-S-APB block diagram

What’s Included?

  • Verilog RTL Source or technology-specific netlist.
  • Comprehensive testbench suite with expected results.
  • Synthesis scripts.
  • Installation & Implementation Guide.
  • Technical Reference Manual.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
DB-I3C-S-APB
Vendor
Digital Blocks, Inc.
Type
Silicon IP

Provider

Digital Blocks, Inc.
HQ: USA
Digital Blocks architects, designs, verifies, and markets semiconductor Intellectually Property (IP) cores to worldwide technology systems companies. The company's expertise is in Embedded Processor & Peripherals, Display Controller, Display Link Layer, 2D Graphics, Image Compression, Audio / Video Processing, and High-Speed Networking / A/V Networking & Routing / High-Frequency Trading Networking.
Contact Digital Blocks, Inc.

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Frequently asked questions about I2C / I3C IP cores

What is I3C Controller IP- Slave, Parameterized FIFO, APB Bus?

I3C Controller IP- Slave, Parameterized FIFO, APB Bus is a I2C / I3C IP core from Digital Blocks, Inc. listed on Semi IP Hub.

How should engineers evaluate this I2C / I3C?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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