UMC 28nm HPM/RVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track Standard Generic Core cell library (C31)
- UMC
- 28nm
- HPM
- Silicon Proven
Standard cell libraries are fundamental building blocks for ASIC and SoC design, providing a set of pre-characterized logic cells used in digital circuit implementation.
These libraries include essential components such as logic gates, flip-flops, latches, and buffers, enabling efficient synthesis and physical design flows.
This catalog allows you to compare standard cell libraries from leading vendors based on performance, power consumption, area, and process node compatibility.
Whether you are targeting high-performance computing, low-power mobile designs, or cost-sensitive applications, you can find the right standard cell library for your project.
UMC 28nm HPM/RVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track generic core cell library (C38)
UMC 28nm HPM/LVT Logic Process 9-track generic core cell library (C38)
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/HVT Logic Process 9-track Standard generic core cell library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard generic core cell library (C38)
UMC 28nm HPM/HVT Logic Process 9-track Standard Generic Core cell library (C35)
UMC 28nm HPM/HVT Logic Process 9-track Standard Generic Core cell library (C35)
UMC 28nm HPM/HVT Logic Process std. generic core cell library (C31)
UMC 28nm HPM/HVT Logic Process std.
UMC 55nm LP/RVT LowK Logic Process 2.5VOD3.3V device RTC Core Library
UMC 55nm LP/RVT LowK Logic Process 2.5VOD3.3V device RTC Core Library
UMC 55nm ULP/uHVT Low-K Logic Process Process 8-track Generic Core Cell Library (C90) w/ Forward Bias
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60)
UMC 55nm ULP/RVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60)
UMC 55nm ULP/LVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60)
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Generic Core Cell Library (C90) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60) w/ Forward Bias.
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60). W/O deep Nwell
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Generic Core Cell Library (C60).
UMC 55nm ULP/HVT Low-K Logic Process Process 8-track Generic Core Cell Library (C90).
UMC 55nm eFlash/RVT LowK Logic Process 8-track Genernic Core cell Library
UMC 55nm eFlash/RVT LowK Logic Process 8-track Genernic Core cell Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 80nm HV Process High Density Standard Cell Library
UMC 80nm HV Process High Density Standard Cell Library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)