Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
TSMC CLN3P 3nm Spread Spectrum PLL - 700MHz-3500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN3P 3nm Multi Phase DLL - 200MHz-1000MHz
The Multi Phase DLL is designed for high-speed interface applications.
TSMC CLN3P 3nm Multi Phase DLL - 400MHz-2000MHz
The Multi Phase DLL is designed for high-speed interface applications.
TSMC CLN3P 3nm Multi Phase DLL - 800MHz-4000MHz
The Multi Phase DLL is designed for high-speed interface applications.
TSMC CLN3P 3nm IoT PLL - 30MHz-1000MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power.
TSMC CLN3P 3nm General Purpose PLL - 400MHz-2000MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN3P 3nm Deskew PLL - 200MHz-1000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
TSMC CLN3P 3nm Deskew PLL - 400MHz-2000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
TSMC CLN3P 3nm Deskew PLL - 800MHz-4000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
TSMC CLN3P 3nm DDR DLL - 188MHz-940MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN3P 3nm DDR DLL - 250MHz-1250MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN3P 3nm DDR DLL - 395MHz-1975MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
TSMC CLN3P 3nm Clock Generator PLL - 200MHz-1000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN3P 3nm Clock Generator PLL - 400MHz-2000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN3P 3nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
TSMC CLN22ULLLVT 22nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…
TSMC CLN22ULLLVT 22nm Spread Spectrum PLL - 153MHz-766MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN22ULLLVT 22nm Spread Spectrum PLL - 306MHz-1530MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN22ULLLVT 22nm Spread Spectrum PLL - 612MHz-3060MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
TSMC CLN22ULLLVT 22nm Multi Phase DLL - 175MHz-875MHz
The Multi Phase DLL is designed for high-speed interface applications.