Your NPU Learned to Listen
Whisper runs end-to-end on Chimera. Encoder and decoder compiled as native GPNPU kernels, INT4 weights, FP16 attention, top-1 token match against the float32 reference. Scales to four cores with a flag, no recompile.
Vendor:
Imagination Technologies Group Ltd.
Category:
NPU
PowerVR Neural Network Accelerator - The ideal choice for mid-range requirements
The PowerVR AX3365 delivers up to 2.0 TOPS performance in a small silicon area.
Overview
The PowerVR AX3365 delivers up to 2.0 TOPS performance in a small silicon area. With its low power consumption, it is ideal for mid-range smartphones, smart surveillance and DTV/set-top box video content.
Key features
- API support
- IMG DNN API
- Android NN HAL
- Framework Support
- Caffe
- TensorFlow
- Bus interface
- AXI4
- Memory system
- Virtual Memory
- TOPS
- 2.0 TOPS
- MACs per clock rate
- 8-bit: 1024 MACs/clk
- 16-bit: 256 MACs/clk
- Architecture
- PowerVR Series3NX
- Markets
- Mid-range smartphone
- Smart surveillance
- DTV and set-top content
- Features
- Security
- Lossless weight compression
Specifications
Identity
Part Number
PowerVR AX3365
Vendor
Imagination Technologies Group Ltd.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
Imagination Technologies Group Ltd.
HQ:
UK
At Imagination, we create and license a range of multimedia and communications processors needed to create SoCs (Systems on Chips) that power mobile, consumer, automotive, enterprise, infrastructure, IoT and embedded electronics.
We are a strong, independent IP company, owned by Canyon Bridge, a Silicon Valley-based private equity firm. We pride ourselves on our consistent focus on creating win-win products in conjunction with our customers. Our powerful, cutting-edge designs are driving the digital revolution forward by enabling our partners to build world-changing electronics.
Learn more about NPU IP core
Can Your NPU Run DOOM? Chimera Can.
Is your NPU DOOMed? Quadric's Chimera GPNPU runs every AI model — and a complete DOOM engine. Find out why Quadric is different.
Heterogeneous NPU Data Movement Tax: Intel's Own Slides Tell the Story
At Quadric, we have long argued that heterogeneous NPU designs — those that stitch together multiple specialized fixed-function engines — carry an unavoidable hidden cost: data has to move. A lot. And data movement burns power, adds latency, and creates silicon-area overhead that scales with every new generation of AI models. Now, Intel has made that case for us.
The Upcoming NPU Shakeout
The IP industry is no stranger to boom and bust cycles, and it looks to be at the crest of another wave.
One Instruction Stream, Infinite Possibilities: The Cervell™ Approach to Reinventing the NPU
AI is evolving faster than the chips designed to run it. Models like large language transformers and generative networks are shifting rapidly–while silicon development cycles remain long and rigid. Traditional NPUs, built around proprietary instruction sets and opaque compilers, simply can’t keep up.
Legacy IP Providers Struggle to Solve the NPU Dilemna
Just bolting a matrix accelerator onto existing processor IP leads to long-term challenges.
Frequently asked questions about NPU IP cores
What is PowerVR Neural Network Accelerator - The ideal choice for mid-range requirements?
PowerVR Neural Network Accelerator - The ideal choice for mid-range requirements is a NPU IP core from Imagination Technologies Group Ltd. listed on Semi IP Hub.
How should engineers evaluate this NPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.