Vendor: MIPS Category: DMA

Data Movement Engine - Turnkey network compute subsystem for data movement applications.

Physical AI platforms interpret their surroundings using a diverse array of sensors, generating data that must be seamlessly tran…

Overview

Physical AI platforms interpret their surroundings using a diverse array of sensors, generating data that must be seamlessly transferred, integrated, and processed rapidly. Establishing priorities, data formats, and moving data to compute elements enables accurate, fast decision making in edge platforms:

  •  Industrial Networking: Rapid packet processing of data through multiple, switched ethernet ports with support for factory automation protocols
  •  5G/6G Communications: Scalable L2/L3 Ethernet switch with flexible port counts/ speeds, including TSN and security
  •  Automotive Gateway: High-speed data packet networking with multiple communication interfaces and support for switching and bridging
  •  Datacenter Infrastructure: Standalone data processing units to handle highly multiplexed data streams corresponding to millions of network connections with high efficiency and low power

The MIPS® Sense portfolio enables low-latency data processing with high-reliability and functional safety capabilities, expanding data movement engines into compute subsystems that couple with edge AI engines.

Designed to accelerate data movement, the MIPS I8600 subsystem is a turn-key accelerator for networking markets that need highly reliable packet processing with support for a variety of market-focused protocols. From ports, protocols, and interfaces, the MIPS I8600 is tailored to increase efficiency with MIPS innovative multithreading capabilities and enhance memory management capabilities.

MIPS I8600 data movement engines increase performance and efficiency using 4-way multi threading capabilities and scalable coherent clusters combined with turnkey enablement of protocol stacks, middleware, and optimized compilers/libraries.

The MIPS I8600 range of compute subsystems will be available for customer evaluation in mid-2025, delivering significantly higher performance for networking packet processing than legacy, proprietary applications cores.

MIPS data movement subsystems, based on the open-specification RISC-V instruction set, are easy to adopt and reduce time to market by providing proven solutions to our customers for building their vision for technology.

Key features

  • Industrial Networking: Rapid packet processing of data through multiple, switched ethernet ports with support for factory automation protocols
  • 5G/6G Communications: Scalable L2/L3 Ethernet switch with flexible port counts/speeds, including TSN and security
  • Automotive Gateway: High-speed data packet networking with multiple communication interfaces and support for switching and bridging
  • Datacenter Infrastructure: Standalone data processing units to handle highly multiplexed data streams corresponding to millions of network connections with high efficiency and low power

Files

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Specifications

Identity

Part Number
I8600
Vendor
MIPS

Provider

MIPS
HQ: USA
MIPS is a leading developer of highly scalable RISC processor IP for high-end automotive, computing and communications applications. With its deep engineering expertise built over 35 years and billions of MIPS-based chips shipped to-date, today the company is accelerating RISC-V innovation for a new era of heterogeneous processing. The company’s proven solutions are uniquely configurable, enabling semiconductor companies to hit exacting performance and power requirements and differentiate their devices.

Learn more about DMA IP core

DMA IP Integration

There are many IP’s today . These IP’s can be simple IP’s like Timer to complex IP’s like Accelerators. In Most of the cases IP’s are Integrated in standard way. There are cases where you have the option of Integrating it differently. This goes un-noticed or unable to be implemented due to time constraints. One such IP that would be discussed in this paper is DMA . This paper tries to explain idea of Integrating Direct Memory access(DMA) and Interrupt Control Unit(ICU) differently but final implementation requires some changes in IP. There is a possibility that alternate design explained below may be already implemented.

Frequently asked questions about DMA IP

What is Data Movement Engine - Turnkey network compute subsystem for data movement applications.?

Data Movement Engine - Turnkey network compute subsystem for data movement applications. is a DMA IP core from MIPS listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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