Vendor: Dolphin Technology Category: DMA

DMA Controller

DTI_DMA control the DMA transfers data between different points in the memory space without intervention of the CPU.

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Overview

DTI_DMA control the DMA transfers data between different points in the memory space without intervention of the CPU. The DMA is generally used to replace two CPU functions: memory copy and transfer data between memory and peripheral (peripheral devices such as SPI, UART, GPIO, I2C, I2S, WDT, etc.)

Key features

  • Support 1 to 16 channels (Parameter Configuration)
  • Support maximum 8 peripherals can connect to 1 DMA channel (Parameter Configuration)
  • Channel Arbitration
  • Multiple transfer direction: memory to memory, memory to peripheral, peripheral to memory
  • Single APB Programming Interface (Programming Registers)
  • 2 AXI4 Master Ports (Parameter Configuration)
  • Asynchronus AXI4/APB Interfaces
  • AXI4 Data Width: 32, 64, 128, 256 or 512 bits (Parameter Configuration)
  • AXI4 Address Width: Up to 32 bits (Parameter Configuration)
  • Support source address, destination address, data tran unaligned with AXI4 data size
  • Single FIFO data per channel
  • Automatic packing/unpacking of data to fit FIFO width
  • Support timeout monitoring
  • Data swapping endian mode
  • Interrupt for DMA transfer and channel status
  • Support Scatter-Gather mode
  • Support Circular mode
  • Support Double Buffer mode
  • Support 1D-2D transfer mode

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
DMA Controller
Vendor
Dolphin Technology

Provider

Dolphin Technology
HQ: USA
Dolphin Technology provides SoC designers with a broad array of silicon-proven IP for Memory, I/O, Standard Cells, DDR PHY, Memory Controllers, PLL/DLL and Memory Test and Repair (BIST). Dolphin offers both standard and custom solutions that are optimized for low power, high performance and high density across a broad range of process technologies. These solutions include: - Memory Compilers (Single & Dual Port SRAM, 1 & 2 Port RF, ROM) - Specialty Memory (ROM, BCAM, TCAM, CAM) - I/O (General purpose, bus-specific, DDR, Flash) - Standard Cell libraries (7-track, 10-track, 12-track, 14-track) - DDR PHY (hardened DDRx & LPDDRx SDRAM PHY) - PLL/DLL (programmable PLL, fully digital DLL) - SERDES - Memory Controllers (DDRx & LPDDRx DRAM) - Memory BIST - And more... Dolphin Technology has been enabling SoC design teams to enhance quality and reduce time to market since 1996.
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Learn more about DMA IP core

DMA IP Integration

There are many IP’s today . These IP’s can be simple IP’s like Timer to complex IP’s like Accelerators. In Most of the cases IP’s are Integrated in standard way. There are cases where you have the option of Integrating it differently. This goes un-noticed or unable to be implemented due to time constraints. One such IP that would be discussed in this paper is DMA . This paper tries to explain idea of Integrating Direct Memory access(DMA) and Interrupt Control Unit(ICU) differently but final implementation requires some changes in IP. There is a possibility that alternate design explained below may be already implemented.

Frequently asked questions about DMA IP

What is DMA Controller?

DMA Controller is a DMA IP core from Dolphin Technology listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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