ARC HS38x4 quad-core 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
- ARC
CPU IP cores provide general-purpose processing for application, control, and system software workloads in modern SoC and ASIC designs.
These IP cores deliver programmable compute for embedded and high-performance SoCs, often serving as the central control or application processor in the architecture
This catalog allows you to compare CPU IP cores from leading vendors based on performance, power efficiency, software ecosystem, and process node compatibility.
Whether you are designing application processors, embedded systems, networking equipment, or compute SoCs, you can find the right CPU IP for your application.
ARC HS38x4 quad-core 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS38x2 dual-core 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS38 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS36x4 quad-core version of HS36 with I and D cache for high-performance embedded applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS36x2 dual-core version of HS36 with I and D cache for high-performance embedded applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS36 32-bit processor core, ARC V2 ISA, for embedded applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS34x4 quad-core version of HS34 for real-time embedded applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS34x2 dual-core version of HS34 for embedded real-time applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
ARC HS34 32-bit processor core, ARC V2 ISA, for embedded applications
The ARC® HS3x processors, which include the HS34, HS36 and HS38, are based on the -efficient ARCv2 instruction set architecture (…
The ARC-V™ RPX-100 series processors feature a dual-issue, 64-bit superscalar architecture for use in high performance applicatio…
ARC-V RHX Series Functional Safety Processor IP
The ARC-V™ RHX-110-FS, RHX-115-FS, RHX-110V-FS, and RHX-115V-FS functional safety processors simplify development of high-perform…
The ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-tim…
ARC Data Fusion Voice/Speech Option
IoT applications increasingly require sensing capabilities that extend beyond what traditional sensors provide.
32-bit RISC-V embedded processor with TÜV SÜD ISO 26262 ASIL B certification
The L31AS is a 32-bit RISC-V embedded processor with TÜV SÜD ISO 26262 ASIL B certification.
Neoverse Compute Subsystems N2 (CSS N2)
Neoverse CSS N2: The Arm Neoverse N2 Platform, Delivered to Partners as a Verified, Performance-Validated Customizable Subsystem …
A CPU Foundation for the AI-Driven Datacenter The Arm Neoverse V3 CPU is built to deliver maximum performance for cloud applicati…
Optimal Performance and Power Efficiency for Hyperscale, Telecom, Networking, and Infrastructure Edge Devices The Arm Neoverse N3…
64-bit RISC-V embedded core with in-order single issue pipeline
64-bit RISC-V embedded core with in-order single issue pipeline.
32-bit RISC-V embedded core with in-order single issue pipeline
32-bit RISC-V embedded core with in-order single issue pipeline.
The second-generation high-performance RISC-V CPU delivers a major leap in compute capability, designed for deployment across dat…