Vector Floating-point coprocessor based on ARM VFPv2 Instruction Set Architecture for FA626TE 32-bit RISC CPU
- FPU
Discover DSP and Math IP for digital signal processing, arithmetic acceleration, and compute-intensive algorithms in semiconductor designs. This category includes IP cores optimized for filtering, transforms, vector processing, fixed-point and floating-point computation, and real-time signal manipulation.
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Vector Floating-point coprocessor based on ARM VFPv2 Instruction Set Architecture for FA626TE 32-bit RISC CPU
24-bit digital signal processor soft core.
24-bit digital signal processor soft core.
16-bit digital signal processor soft core
16-bit digital signal processor soft core.
16-bit digital signal processor soft core
16-bit digital signal processor soft core.
Customize a modem with various building blocks, e.g.
GSM Equalizer/Demodulator and SCH Decoder
Single channel GSM equalizer/demodulator + SCH decoder
Wideband polyphase channelizer/resampler supporting up to 128 contiguous GSM channels
The Queue Manager creates and maintains queues in memory for use in interprocess communication and I/O device communication with …