This IP is a programmable Analog PLL suitable for high speed clock generation.
- PLL
- GDS Ready
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
This IP is a programmable Analog PLL suitable for high speed clock generation.
IBM10LPE 1.2v/2.5v 11bit R2R DAC
The I65LPEV25_R2RDAC_01 is a 11bit 1MHz DAC IP.
This analog 2-1 MUX is designed for low speed application.
Voltage Detector IP, 4 Levels, UMC 90nm LL process
4-Level Voltage Detector for USB-OTG, UMC 90nm LL Logic/RVT Low-K process and 2.5V overdrive 3.3V device.
Voltage Detector IP, 4 Levels, UMC 90nm SP process
4-Level Voltage Detector for USB-OTG, UMC 90nm Lgic SP/RVT Low-K process and 2.5V overdrive 3.3V device.
Voltage Detector IP, 4 Levels, UMC 65nm SP process
4-Level Voltage Detector for USB-OTG (2.5V overdrive 3.3V device), UMC 65nm SP Logic-HVT Low-K process.
Voltage Detector IP, 4 Levels, UMC 55nm SP process
4-Level Voltage Detector for USB-OTG, UMC 55nm 2.5V overdrive 3.3V device SP/HVT Low-K Logic process.
Voltage Detector IP, VCC: 1.8V, Vdet=1.3V, UMC 0.18um G2 process
Vdet=1.3V Vhys=0.1V, VCCA=1.8V, Ivcca=35uA, UMC 0.18um GII Logic process.
Linear Regulator IP, Output: 1.2V/100mA, UMC 90nm SP process
2.5V to 1.2V with 100mA driving capability, Istb=50uA, Linear Regulator, UMC 90nm SP/RVT Low-K process.
Linear Regulator IP, Output: 1.2V/60mA, UMC 90nm LL process
1.8V to 1.2V with 60mA driving capability, Istb=80uA, Linear Regulator, UMC 90nm LL Logic/RVT Low-K process.
Linear Regulator IP, Output: 1.2V/150mA, UMC 65nm LL process
3.3V to 1.2V with 150mA driving capability, Istb=200uA, Linear Regulator, UMC 65nm LL/RVT Low-K Logic process.
Linear Regulator IP, Output: 2.5V/150mA, UMC 65nm SP process
3.3V to 2.5V with 150mA driving capability, Linear Regulator, UMC 65nm SP/RVT Low-K Logic process.
Linear Regulator IP, Output: 3.3V/120mA, UMC 0.18um G2 process
3.3V with 120mA driving capability, Istb=60uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 5.0V, Output: 3.3V/250mA, 1.8V/70mA, UMC 0.18um G2 process
5V to 3.3V/1.8V with 250mA/70 mA driving capability, Istb=80uA, Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 4.0-5.5V, Output: 3.3V/250mA, 1.8V/70mA, UMC 0.18um eFlash/G2 process
5V to 3.3V and 1.8V with 250mA and 70mA driving capability, Istb=200uA, Linear Regulator, UMC 0.18um eFlash process.
Linear Regulator IP, Input: 3.3V, Output: 1.8V/150mA, UMC 0.18um eFlash/G2 process
3.3V to 1.8V LDO regulator with 150mA driving.Iq=66uA, UMC 0.18um eFlash process.
Linear Regulator IP, Output: 3.3V/200mA, UMC 0.13um HS/FSG process
5V to 3.3V(200mA) & 1.2V(110mA) audio solution regulator, UMC 0.13um HS/FSG Logic process.
Linear Regulator IP, Output: 1.2V/100mA, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V to 1.2V with 100mA driving capability, High PSRR linear Regulator.
3.3V to 1.8V high efficiency converter with 200mA driving capability PWM Regulator, UMC 0.13um HS/FSG Logic process.
3.3V to 1.8V high efficiency converter with 150mA driving capability, PWM Regulator, UMC 0.13um LL Logic/FSG process.