5V with 250mA driving capability, Istb=120uA Linear Regulator, UMC 0.18um GII Logic process.
- UMC
- 180nm
- G
LDO Voltage Regulator IP cores provide low-noise linear voltage regulation for sensitive loads in modern SoC and ASIC designs.
These IP cores are widely used to create clean local supplies for analog, RF, sensor, and always-on circuits where noise and simplicity matter more than peak switching efficiency
This catalog allows you to compare LDO Voltage Regulator IP cores from leading vendors based on dropout voltage, output noise, load regulation, and process node compatibility.
Whether you are designing analog subsystems, RF circuits, sensor interfaces, or always-on domains, you can find the right LDO Voltage Regulator IP for your application.
5V with 250mA driving capability, Istb=120uA Linear Regulator, UMC 0.18um GII Logic process.
3.3V with 150mA driving capability, Istb=96uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 1.65V-3.6V, Output: 1.8V / 60mA, UMC 0.18um G2 process
3.3V with 60mA driving capability, Istb=85uA Linear Regulator, UMC 0.18um GII Logic process.
Linear Regulator IP, Input: 1.65V-3.6V, Output: 1.8V / 240mA, UMC 0.18um G2 process
3.3V with 240mA driving capability, Istb=uA Linear Regulator, UMC 0.18um LL Logic process.
Output Voltage Regulator: 1.1V, Input Voltage:2.97V ~ 3.63V
Output Voltage:1.1V, Input Voltage:2.97V ~ 3.63V, Output Loading:100mA.
Output Voltage Regulator: 1.1V, Input Voltage:2.4V ~ 3.63V
Output Voltage:1.1V, Input Voltage:2.4V ~ 3.63V, Output Loading:100mA.
LDO for 40nm eFuse 3.3V application(LDO + eFuse)
LDO for 40nm eFuse 3.3V application(LDO + eFuse)
Linear Regulator IP, Output: 3.3V/350mA, UMC 0.11um HS/FSG process
Input 4.5V-5.5V, 3.3V/350mA and 1.2V/350mA Voltage Regulator, UMC 0.11um HS/FSG Logic process.
Linear Regulator IP, Output: 3.3V/350mA, UMC 0.11um HS/AE process
Input 4.5V-5.5V, 3.3V/350mA and 1.2V/100mA Voltage Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Linear Regulator IP, Output: 3.3V/300mA, UMC 0.11um HS/AE process
5V to 3.3V with 300mA driving capability, Cascode Structure Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Linear Regulator IP, Output: 3.3V/150mA, UMC 0.11um HS/FSG process
Input 4.5V-5.5V, 3.3V/150mA Output Regulator, UMC 0.11um HS/FSG Logic process.
Linear Regulator IP, Output: 2.8V/20mA, UMC 55nm SP process
3.3V to 2.8V with 20mA driving capability, Linear Regulator, UMC 55nm SP/RVT Logic process.
Linear Regulator IP, Output: 2.8V/20mA, UMC 0.11um HS/AE process
3.3V to 2.8V with 20mA driving capability, Linear Regulator, UMC 0.11 um AE/HS Logic process.
Linear Regulator IP, Output: 2.5V/50mA, UMC 40nm LP process
3.3V to 2.5V with 50mA driving capability, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process.
Linear Regulator IP, Output: 2.5V/300mA, UMC 0.11um HS/FSG process
3.3V to 2.5V with 300mA driving capability, Linear Regulator, UMC 0.11um HS/FSG Logic Logic process.
Linear Regulator IP, Output: 2.5V/200mA, UMC 65nm LL process
3.3V to 2.5V with 200mA driving capability, Linear Regulator, UMC 65nm LL/RVT Low-K Logic process.
Linear Regulator IP, Output: 1V/60mA, UMC 65nm SP process
1.8V to 1.0V with 60mA driving capability, Linear Regulator, UMC 65nm SP/RVT Low-K Logic process.
Linear Regulator IP, Output: 1V/150mA, UMC 55nm SP process
3.3V to 1.0V with 150mA driving capability, Linear Regulator, UMC 55nm SP/RVT Low-K Logic process.
Linear Regulator IP, Output: 1.8V/100mA, UMC 0.11um HS/FSG process
3.3V to 1.8V with 100mA driving capability, Linear Regulator, UMC 0.11um HS/FSG Logic process.
Linear Regulator IP, Output: 1.2V/50mA, UMC 0.11um HS/AE process
3.3V to 1.2V with 50mA driving capability, Linear Regulator, UMC 0.11um HS/AE (AL Enhancement) Logic process.