ST plans for Dresden FDSOI production
Peter Clarke, EETimes
1/20/2013 1:34 PM EST
ST claims that at 28-nm, its FDSOI process can provide 30 percent more performance than bulk 28-nm CMOS at the same power consumption, or, alternatively, can provide as much as a 50 percent saving in dynamic power consumption at the same performance. This is because FDSOI allows the use of voltages down to 0.6-V whereas bulk CMOS only goes down to about 0.9-V, said Joel Hartmann, executive vice president of front-end manufacturing and process R&D, for the digital sector at ST.
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