TSMC Recognizes Synopsys with Four Partner Awards at the Open Innovation Platform Forum Event 2018-10-04 09:15:00 Misc
Omnitek Demonstrates Highest Performance Convolutional Neural Network on an FPGA 2018-10-04 05:42:00 IP Cores & Design
Xilinx Unveils Versal: The First in a New Category of Platforms Delivering Rapid Innovation with Software Programmability and Scalable AI Inference 2018-10-03 17:15:00 SoC Architecture & Assembly
Analog Bits to demonstrate Low Power SERDES at TSMC's Open Innovation Platform Ecosystem Forum 2018-10-03 15:26:00 Misc
Synopsys Announces Availability of TSMC-certified IC Design Environment in the Cloud 2018-10-03 11:41:00 EDA & Design Tools
Cadence Expands its Cloud Portfolio with Delivery of TSMC OIP Virtual Design Environment 2018-10-03 10:39:00 EDA & Design Tools
SiFive Welcomes Former Tesla Executive to Lead Global Growth Strategy 2018-10-03 08:00:00 People & Leadership
Silicon Creations Highlights PLL Developments in 22nm, 12nm, 7nm, and 5nm at TSMC OIP Ecosystem Forum 2018-10-02 19:20:00 IP Cores & Design
Cadence Delivers Support for TSMC InFO_MS Advanced Packaging Technologies 2018-10-02 16:58:00 EDA & Design Tools
Arteris IP FlexNoC Interconnect and Resilience Package Licensed by Autotalks for Automotive V2X Communications Chipsets 2018-10-02 16:31:00 Commercial Deals
Xilinx Launches the World's Fastest Data Center and AI Accelerator Cards 2018-10-02 12:41:00 SoC Architecture & Assembly
M31 Technology's Diversified TSMC 28HPC+ ULL Memory Compilers Empower More Flexible SoC Design Architecture 2018-10-02 08:57:00 IP Cores & Design
Synopsys Digital and Custom Design Platforms Certified on TSMC 5-nm EUV-based Process Technology 2018-10-02 08:51:00 EDA & Design Tools
Arm expands design possibilities with free Cortex-M processors for Xilinx FPGAs 2018-10-01 21:07:00 IP Cores & Design
Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation 2018-10-01 15:28:00 EDA & Design Tools
Synopsys Delivers Automotive-Grade IP in TSMC 7-nm Process for ADAS Designs 2018-10-01 15:09:00 IP Cores & Design