Siemens accelerates complex semiconductor design and test with Tessent IJTAG Pro 2025-09-23 11:59:00 EDA & Design Tools
Thalia and X-FAB Forge Strategic Partnership to Safeguard Supply and Accelerate IP Migration 2025-09-23 09:42:00 EDA & Design Tools
Morse Micro Secures $88 Million AUD Series C Funding to Lead the Next Era of IoT 2025-09-23 06:59:00 Strategic Partnerships
MIPI A-PHY Reaches Milestone of First SerDes Standard to Enter Mass Production with Global Automotive OEM 2025-09-23 05:21:00 Standards & Interconnects
Analog Bits Adds New Power and Energy Management IP Blocks Proven on TSMC N2P and N3P Processes at TSMC 2025 OIP Ecosystem Forum 2025-09-22 15:14:00 IP Cores & Design
Empower Semiconductor Secures Over $140M in Series D Financing 2025-09-22 13:05:00 Strategic Partnerships
Siemens unveils groundbreaking Tessent AnalogTest software for automated analog circuit test generation 2025-09-22 12:51:00 EDA & Design Tools
Euclyd Unveils CRAFTWERK: The World’s Most Power-Efficient Exascale Token Factory for Agentic AI 2025-09-22 07:31:00 SoC Architecture & Assembly
MIPS Appoints Alan Li as Head of Business Development to Accelerate China Growth 2025-09-22 05:46:00 People & Leadership
BrainChip Expands Global Reach, Announces Akida Boards and AI Development Kits Available at DigiKey 2025-09-19 05:27:00 SoC Architecture & Assembly
Qualitas Semiconductor Successfully Demonstrates Live UCIe PHY IP at AI Infra Summit 2025 2025-09-18 12:50:00 IP Cores & Design
Silicon Creations Announces 1000th Production FinFET Tapeout at TSMC and Immediate Availability of Full IP Library on TSMC N2 Technology 2025-09-18 12:30:00 Strategic Partnerships
Intel and NVIDIA to Jointly Develop AI Infrastructure and Personal Computing Products 2025-09-18 11:29:00 Strategic Partnerships
Comcores MACsec IP is compliant with the OPEN Alliance Standard 2025-09-18 10:36:00 IP Cores & Design
Sofics joins GlobalFoundries’ GlobalSolutions Ecosystem to Enhance Chip Robustness, Performance and Design Efficiency 2025-09-18 08:35:00 Strategic Partnerships
Presto Engineering Tapes Out 2 Macro IPs with X-FAB for Low-Power and High-Precision Sensing Applications 2025-09-18 06:01:00 IP Cores & Design
Zero ASIC releases Wildebeest, the world’s highest performance FPGA synthesis tool 2025-09-18 05:47:00 EDA & Design Tools