Intilop Corporation announces release of a whole new series of 4th Gen Ultra-Low latency; sub 100 ns, Full TCP Offload and UDP Offload Engines and System solutions for the entire Network Communication sector
Santa Clara, CA. – January 11, 2012 -- Intilop, Inc. a pioneer and a recognized leader in providing complex Ultra-Low latency networking IP building blocks and systems, today announced new 4th Gen SX-Series TCP Offload and UDP Offload IPs based around enhanced TOE Architecture, these Industry leading Ultra-Low latency 10G TOE and UOE IP products have fully integrated EMAC and optional PCIe/DMA, as a system, is geared to provide Ultra-High performance NIC functionality also.
The Series include IPs and solutions:
- 10G bit TCP Offload Engines
- 10G bit UDP Offload Engines
- 10G bit TCP + UDP Offload Engines
- 1G bit TOE and UOE SoC IPs
- Total System solutions.
The TCP Ultra-Low latency SX-Series of IPs are a 'drop-in' replacement for the previous Gen Very-Low latency TOE IP X-series. The X-Series offers sub 200 ns latency.
This is the first time the latency barrier of 100 nanoseconds has been shattered, offering Ultra-Low Latency and Highest Performance with highest TCP and UDP bandwidths ....bar none!
The latency of less than 100 nanoseconds for our 4th. Gen 10G TOE and UOE (UDP Offload Engine) sets the bar much higher for speed and performance based upon our mature, proven and TCP Protocol Compliant architecture.
Not only it offers sub-100 ns latency and near wire speed TCP performance, it also offers customization flexibility to network architects to design world-class system level applications tailored to their specific needs.
The 100 ns latency is for the MAC+TOE subsystem; Layer-2 thru Layer-4, not just TCP layer. This was accomplished by custom ‘Handcrafted’ hardware implementing patent pending innovative TOE architecture.
The highly deterministic performance, reliable and proven ultra-low latency, coupled with customizability offered by the 10G TOE can be effectively applied to gain wire-speed competitive edge by all Networking Equipment makers.
Customers now have a larger variety of cutting edge TCP offload products to choose from, when they want to move up in the nanosecond league from the microsecond league. By utilizing the full benefits of pivotal 10G SX TOE and UOE technologies they can confidently exceed their challenging network system performance objectives.
In addition, it offers unprecedented TCP throughput of more than 95% for large and small size payload data transfers on a 10G network, which is 8 – 15x higher as compared to TCP/IP software running network traffic.
The TOE’s Patent pending architecture is highly scalable, customizable and adaptable without compromising the low latency and performance. Intilop’s product-line solutions are available in flexible FPGA/ASIC/SoC technologies which can easily accommodate diverse set of appliance maker’s technical design specifications.
Intilop Corporation is a developer and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IPs with comprehensive hardware and software solutions.
Please visit the company website at: www.intilop.com
Pricing and product info contact: info@intilop.com
Related Semiconductor IP
Related News
- Intelop corporation's TCP Offload engine IP delivers amazing TCP/IP throughput
- Intilop (formerly Intelop) corporation's TCP Offload engine IP solution delivers amazing TCP/IP throughput as reported by customers in system level performance testing
- Intilop corporation announces a record breaking lowest latency & highest bandwidth 10G bit TCP offload engine
- Intilop announces a record breaking Ultra low latency & highest bandwidth 10G bit TCP offload engine SOC for Altera FPGA family
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers