Moortec Announce route2IP - a Collaborative Initiative for Sub-Picosecond Jitter PLL Design

Plymouth, UK -- December 7, 2007 - Moortec, the semiconductor design company, announces "route2IP". "route2IP" is an initiative to bring high performance analog and mixed-signal IP, in particular low-jitter PLL designs, to UK and European customers.

“There is a high demand for challenging analog/mixed-signal IP from semiconductor OEMs and startups, particularly from those engaged in complex, largely digital SoC developments on 65nm and 90nm technologies”, explains Moortec’s Managing Director, Steve Crosher. “Our ‘route2IP’ initiative allows SoC developers to gain high performance analog block functions, such as low jitter PLLs, whilst retaining IP and internal reuse rights”.

Since its inception in May 2005, Moortec has provided mixed-signal IP blocks for consumer, medical and automotive applications. With ‘route2IP’ Moortec offers an alternative to the common IP delivery model used by IP vendors.

“We’re very excited about ‘route2IP’, as it allows our world-class PLL design experts to work closely with those customers targeting designs at cutting edge geometries”, continues Crosher. “The scheme will run alongside our established design services model which has been offered since startup”.

‘route2IP’ offers a commercial arrangement whereby the IP will be shared between vendor and customer. Under the terms of the collaboration the customer is able to own high performance analog blocks on an attractive cost model compared with normal IP vendor arrangements.

About Moortec

Moortec, established in 2005, designs high performance analog and mixed-signal circuits for System on Chip (SoC) devices. The company offers complete solutions to the global semiconductor industry, including mixed-signal IP blocks, SoC verification, test and demonstration platforms, consulting services, and comprehensive technical support provided directly by the IP designers. For more information on Moortec, please visit www.moortec.com .