Rambus to Showcase Its High-Speed SerDes Portfolio at the TSMC 2016 Open Innovation Platform® Ecosystem Forum
SUNNYVALE, Calif. -- September 21, 2016 -- Rambus will participate in the TSMC Open Innovation Platform (OIP) Ecosystem Forum and showcase its high-speed SerDes portfolio, including technologies stemming from the recently-acquired Snowbush IP assets. Rambus’ collaboration with TSMC optimizes the development of its high-speed SerDes in TSMC's process technologies to address the challenges of data-intensive markets, including networking and data centers.
Who: Rambus Inc. (NASDAQ:RMBS)
Where:
TSMC 2016 Open Innovation Platform Ecosystem Forum
San Jose McEnery Convention Center
Rambus booth # 412
When: September 22, 2016
About Rambus Memory and Interfaces Division (MID)
The Rambus Memory and Interfaces Division develops products and services that solve the power, performance, and capacity challenges of the mobile, connected device, and cloud computing markets. Rambus enhanced standards-compatible and custom memory and serial link solutions include chips, architectures, memory and chip-to-chip interfaces, DRAM, IP validation tools, and system and IC design services. Developed through our system-aware design methodology, Rambus products deliver improved time-to-market and first-time-right quality.
About Rambus Inc.
Rambus creates innovative hardware and software technologies, driving advancements from the data center to the mobile edge. Our chips, customizable IP cores, architecture licenses, tools, services, software, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile, consumer and media platforms. At Rambus, we are makers of better. For more information, visit rambus.com.
Related Semiconductor IP
- HBM4 PHY IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
- VIP for Compute Express Link (CXL)
- HBM4 Controller IP
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