Quicksilver tackles reconfigurable software radios

Quicksilver tackles reconfigurable software radios
By Loring Wirbel, EE Times
January 25, 1999 (12:02 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990125S0011

CAMPBELL, Calif. — A startup is moving reconfigurable computing up a notch by initially focusing its novel implementation techniques on software-defined radios for third-generation digital cellular phones. Formed by executives from Xilinx Inc.'s reconfigurable-computing program, QuickSilver Technology Inc. hopes to use a reconfigurable architecture to hit a target many DSP and RF vendors have been gunning for: a single baseband controller for a cell-phone handset that could cover a fragmented market of cellular air interfaces and frequency bands.

The effort comes at a key moment for the fractured cellular world. Companies in Europe are already pushing past calls from standards and political groups for a unified third-generation, or 3G, cellular standard. The strategic nature of the silicon effort has not been lost on BellSouth Mobility DCS, the cellular arm of BellSouth, which has taken an initial inve stment in the startup.

QuickSilver is not limiting its market targets to cellular radio, but figures that the integration of retargetable baseband and intermediate-frequency (IF) functions is one of the clearest applications for its "WunChip."

"In a way, pursuit of 3G designs is a worst-case market, because of the severe power and real-estate constraints," said Paul Master, vice president of systems engineering. "If we start with the hardest design point, we can degrade the solution for other markets."

The Wireless Universal 'Ngine, or WunChip, supports a variety of baseband algorithms that are downloaded from software, yet run at the full hardware speed required for a given frequency band. The real-time retargetability is faster than traditional downloads from firmware ROM, Master said. The design will handle a variety of air interfaces, including TDMA, CDMA and Global Systems for Mobile telecommunications baseband designs.

Sources also said the adaptable architectures QuickS ilver is planning will be good at the parallel-processing problems — typically seen as almost intractable with FPGAs or ASICs — that arise in adaptive beam forming, interference reduction and forward error correction.

The WunChip architecture comes from a fertile field of reconfigurable-computing research. QuickSilver acquired patents and early designs from a semiconductor company that worked on the technology under Darpa contracts. QuickSilver declined to identify the company, though Master made clear it was not Xilinx.

Reconfigurable-computing enthusiasts claim that a large array of programmable logic can be used in place of predefined processing elements — CPU cores, DSP cores or even custom data paths — to achieve flexibility and higher throughput. The technology is based on two techniques. In the first, designers create a custom data path that exactly fits the best sequence of instructions to implement the required algorithms. Thus, a demodulator expressed in C by a series of nested loops, each with logical tests and arithmetic computations, would give way to a single hardware pipeline with specialized ALUs and transfer paths. That would eliminate all of the time a DSP core would spend in fetching instructions, testing and branching, and many arithmetic and logic operations would be performed in parallel.

However, this requires multiple adders, multipliers and logic units, often creating designs that are too large and slow for existing FPGAs. That's where a second technique comes into play: reduction of order. In most algorithms, much of the arithmetic involves constants that change slowly or not at all. A FIR filter, for example, requires huge numbers of multiplications, but in each one, the multiplicand is a constant. In programmable logic, a full integer multiplier can be replaced by a modest amount of random logic. Similarly, for additions that involve constants, simple combinatorial circuits can replace full adders.

These techniques working toget her have important implications for such applications as IF filtering and baseband processing in software radios. Because a new implementation can be prepared for any new combination of frequencies, modulation schemes and protocols, the same FPGA-like hardware can be used in each case. And because of the very high processing speeds available with reconfigurable techniques and programmable logic, digital signal processing can be pushed much further up toward the antenna than has been possible with conventional DSP cores.

This puts tantalizingly within reach the ultimate promise of software radio: directly digitizing the first IF or even the RF signal and performing all IF operations in software. Theoretically, a device like WunChip could implement both IF filters optimized to a particular standard's modulation scheme and baseband decoding for the standard.

QuickSilver is not ready to disclose details of its Adaptive Computing Machine architecture yet, except to say that it incorporates element s of integer, RISC and DSP computing in a system-on-a-chip architecture that the company will aim at several markets. QuickSilver says the WunChip will offer inherently lower power dissipation and easier interfaces to RF front ends than programmable DSP systems.

By the time WunChips sample in significant volume, the air-interface wars for 3G phones may be over. QuickSilver does not plan on a product introduction until late in 2000.

"Handset designers will need to plan for heterogeneous networks," Master countered. "Even if there is a clear 3G winner, there are plenty of complex roaming arrangements that need to be made with 2G and 2.5G units in the field."

That argument must hold water for BellSouth Mobility, an initial investor. The two companies have signed a request for a proposal to design a universal handset around WunChip technology. BellSouth wants a module, based on CMOS and silicon-on-insulator technology, that will handle at least four air interfaces and any frequency band f rom 800 MHz to 2.1 GHz, while digitizing all steps from the first RF stage (after the low-noise amp) down to baseband.

Will Strauss, principal analyst with Forward Concepts Inc. (Tempe, Ariz.), said that QuickSilver's focus on parallel, vector-oriented problems convinced him that "they may say they're not DSP, but there clearly will be DSP cores as part of the design." Strauss said he anticipates the reconfigurable logic will be used to control embedded DSP cores. In his view, the specific blend of DSP and integer logic developed by QuickSilver may be unique.

"And the timing is certainly right, because they are developing the architecture just as the 3G evolution is leading us to problems of multiple frequencies and air interfaces," he said.

QuickSilver still faces the major challenge of software support to turn an algorithm into an optimal logic configuration automatically. The company is building many of its own development tools, at a higher level than traditional EDA tools, to fin e-tune algorithms for the application at hand. To make the system easy to adapt for OEMs, it will need a suite of expert blocks, similar to system-on-a-chip "soft" blocks, as well as high-level development tools based on a C-like construct.

Master foresees working with OEMs to develop reference designs and application guidelines. It's not yet clear, he said, whether it will offer its design tools on the merchant market.

Both chief executive Jaime Cummins and vice president of marketing and sales John Watson are veterans of Xilinx. Master worked on adaptive antenna arrays at Boeing.

— Ron Wilson contributed to this report.