Coreworks demos multi-channel audio encoder and decoders at Inter-Bee and Embedded Technology 2009 shows
Tokyo -- November 17, 2009 -- Coreworks S.A., a leading provider of audio semiconductor IP solutions, is now demonstrating their Dolby Digital Professional Audio Encoder and its Dolby Digital and MPEG1 Layers I and II decoders at Inter-Bee 2009, held in Chiba City, and at Embedded Technology (ET), held in Yokohama. Both shows are in the Greater Tokyo area, in Japan, and happen from November 18th to 20th, 2009.
These are the first audio codecs that are implemented in FPGAs, given the small area and low power characteristics of Coreworks' SideWorks(TM) technology used in their implementation. This technology can also be used in SoCs and ASSPs, and produces the most area and power efficient results amongst licensable cores, at least according to BDTI's set of DSP benchmark results (see www.bdti.com for more information).
Live demos of the Dolby Digital Professional Audio Encoder and the Dolby Digital and MPEG1 Layers I and II decoders can be seen at Inter-Bee 2009 in the Xilinx(R) booth (Hall 6, Booth #6115), and at ET 2009 in the Spinnaker Systems(R) booth (IP Hall, Booth #001). Coreworks is a Xilinx Alliance partner (www.xilinx.com) and is represented in Japan by Spinnaker Systems (www.spinnaker.co.jp).
"The Coreworks audio cores, built with our patent pending reconfigurable architecture SideWorks, are drawing a lot of attention from the FPGA and SoC communities, given their small area and low power capabilities." said Jose T. de Sousa, Coreworks President and CEO. "Coreworks' solid and cost optimized pre and post-sales technical support structure, which is able to vigorously and relentlessly support tier-1 customers worldwide, plays an important role in determining our customers' preference for our solutions."
About Coreworks®
Coreworks S.A. is a leading provider of multimedia and communications semiconductor intellectual property. Coreworks’ IPs have been integrated in a wide variety of products, and implemented in various process geometries. Its proprietary technology and tools allows rapid creation and programming of Reconfigurable HW/SW IPs, targeting emerging applications such as audio, video and communications.
Related Semiconductor IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
- ReRAM NVM in DB HiTek 130nm BCD
- UFS 5.0 Host Controller IP
- PDM Receiver/PDM-to-PCM Converter
Related News
- Barco Silex releases Multi-Channel Ultra HDTV 8K JPEG 2000 encoder and decoder cores
- Ittiam Systems Announces Availability and Software Licensing of HEVC (H.265) Video Encoder and Decoder for Professional, Enterprise and Consumer Digital Media Markets
- Creonic to Supply New LDPC Decoder and Encoder IP Cores for CCSDS Standard
- PathPartner Technology Announces Availability of HEVC Encoder and Decoder Solutions on x86 Family Platforms
Latest News
- Rambus Unveils HBM4E Controller: 16 GT/s, 2,048-Bit Interface, Enabling C-HBM4E
- AimFuture, a Leader in Home Appliance NPUs, to Integrate Mesacure Company’s AI Algorithms
- Security in the Quantum Era: From Cryptography to Trust — ICTK Introduces a Hardware Trust Foundation for the Quantum Era
- TES unveils a next-generation Elliptic Curve Digital Signature Algorithm (ECDSA) IP Core for Secure IoT, Blockchain, and Industrial Systems
- Seligman Ventures Leads Cognichip’s $60M Series A to Back Physics-Informed AI for Chip Design, Intel CEO Lip-Bu Tan and Seligman Ventures’ Umesh Padval Join the Board