Fraunhofer IPMS presents TSN IP core designs with low latency for automotive on-board networks
On-board networking with lowest latency for the modern vehicle
February 09, 2021 -- Digitalization is making its way into vehicles as well: more and more data from sensors, infotainment and safety systems must be prioritized in the on-board network and transmitted using various communication protocols. A high-performance vehicle network like automotive Ethernet, which offers advantages such as standardization, scalability and support for IP protocols, is essential for this. Fraunhofer IPMS is developing platform-independent IP core controllers with very low latencies for this purpose. At the Automotive Ethernet Congress from February 9 – 11, 2021, Fraunhofer IPMS will present its developments in a workshop featuring a live demonstration.
Modern vehicles generate and transmit data continuously to bring us as passengers safely and relaxed to our destination. Numerous sensors for condition monitoring, comfort functions, infotainment applications, powertrain and driver assistance systems – already today, more than 70 control units are used for this purpose, whose signals must be prioritized and transmitted via communication protocols. The data traffic has grown to such an extent that it can no longer be handled by conventional systems. Time Sensitive Networking (TSN) is a key technology for deterministic automotive Ethernet networks with guaranteed bandwidth and low latencies.
IP core controller for safe driving
“The automotive industry is moving away from the use of many individual control units connected via relatively slow classic bus systems such as CAN or LIN to centralized computing units connected via networks with high bandwidths and low latencies. This allows the demands for energy efficiency, safety and economy to be reconciled. Open solutions that are standardized worldwide for compatibility reasons, such as IEEE 802.1/.3 Ethernet, are coming to the fore,” explains Marcus Pietzsch, group leader IP Core and ASIC Design at Fraunhofer IPMS.
Together with his team, Marcus Pietzsch develops platform-independent IP cores pre-certified according to ISO 26262 up to ASIL-D for communication in vehicles. The automotive IP cores are suitable for integration in both FPGAs and ASICs. Pre-certification shortens the development and approval process of the overall system enormously, since all functions, including the necessary safety features, are fully implemented and tested. This guarantees maximum functional safety in the vehicle, while at the same time minimizing the costs and time required for system development.
Live demonstration at Automotive Ethernet Congress 2021
Fraunhofer IPMS will present its developments at the Automotive Ethernet Congress, a leading trade congress of the automotive industry, which will take place in digital form from February 9 – 11, 2021. In addition, visitors can learn about Fraunhofer IPMS technologies at a workshop on “Ultra Low Latency TSN Networks” on February 9 at 6 p.m. and talk to Ethernet TSN experts during a live demonstration based on a TSN example setup.
Find more information at: https://www.ipms.fraunhofer.de/en/events/2021/Automotive_Ethernet_Congress.html
About Fraunhofer IPMS
The Fraunhofer Institute for Photonic Microsystems IPMS stands for applied research and development in the fields of industrial manufacturing, medical technology and improved quality of life. Our research focuses on miniaturized sensors and actuators, integrated circuits, wireless and wired data communication, and customized MEMS systems. Fraunhofer IPMS has years of experience in the design of IP cores for automotive communication and has a family of TSN IP cores. More than 150 applications worldwide use Fraunhofer IPMS IP cores, many of them in in-vehicle networking. The multidisciplinary IP design team of Fraunhofer IPMS with expertise in domain-specific computer architectures, network structures, RTL design and implementation of electronic systems is also available as a competent development partner for application-specific adaptations of the IP cores and their integration into complex network architectures.
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