Eutecus Multi-core Video Analytics Engine enables traffic management solution
November 13, 2013 -- Dong Shi Yuan (D.S.Y.) Technologies (Beijing, China) have launched a traffic management solution powered by the Multi-core Video Analytics Engine (MVE) IP of Eutecus embedded in an Altera Cyclone IV FPGA chip. The video analytics engine achieves full-frame detection of various traffic events like accident, traveling in wrong direction, and so on, for one to eight video feed channels at standard definition, or two channels in high definition. Its cutting-edge real-time, frame-by-frame detection capability guarantees high detection rates while dramatically reducing incidences of data misinterpretation and improving practicality. A recent test done by DSY indicated that this analyzer achieves up to 99 percent detection rate on a highway during daytime under various conditions.
Related Semiconductor IP
- Bilinear Video Scaling Engine
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Flexible Pixel Processor Video IP
- Neural Video Processor IP
- APV - Advanced Professional Video Codec
Related News
- Xilinx and Eutecus Demonstrate Programmable Embedded Video Analytics Platform at Electronica 2008
- Altera and Eutecus Announce World's First 1080p/30fps Video Analytics Solution on an FPGA
- Altera and Eutecus Provide FPGA-Based Video Analytics Solution for Multi-Channel D1 Resolution Video Surveillance Systems
- UltraSoC embedded analytics and Imperas virtual platforms combine to enhance multicore development and debug
Latest News
- Movellus Partners with Synopsys to Deliver Power Efficiency for Next Generation IC’s
- BrainChip Enables the Next Generation of Always-On Wearables with the AkidaTag© Reference Platform
- eSOL and Quintauris Partner to Expand Software Integration in RISC-V Automotive Platforms
- PQShield unveils ultra-small PQC embedded security breakthroughs
- CAST Introduces 400 Gbps UDP/IP Hardware Stack IP Core for High-Performance ASIC Designs