CAST Introduces GZIP Accelerator Through New Intel FPGA Data Center Acceleration Ecosystem
WOODCLIFF LAKE, NJ USA -- October 17 2017 --A hardware accelerator that addresses the data compression and storage optimization needs of performance-critical data center applications is now available from semiconductor intellectual property provider CAST, Inc. This GZIP Accelerator Function is part of the expanded Intel® FPGA Design Solutions Network (DSN), of which CAST is an early member.
The CAST GZIP Accelerator integrates the popular ZipAccel-C™ GZIP/ZLIB/Deflate Compression IP Core with a PCIe interface, Direct Memory Access (DMA) function, and essential driver software in a high-performance, plug-and-play FPGA data compression system. Lossless data compression rates can exceed 40 Gbps, making the GIP Accelerator an excellent choice for servers or database applications, where its data compression optimizes storage requirements or reduces network bandwidth needs.
The CAST GZIP Accelerator (GZIP-RD-A10) IP implemented in an FPGA on the
Intel Programmable Acceleration Card (PAC).
The CAST GZIP Accelerator is now available as a ‘drop-in’ accelerator function for the Intel Programmable Acceleration Card (Intel PAC) with Intel Arria 10 GX FPGA that is then added to servers. The Intel PAC card also pulls in frameworks and libraries using the Intel Acceleration Stack for Intel Xeon CPU with FPGAs, easing the use of FPGA acceleration.
“We’re seeing strong demand for our hardware GZIP data compression solution from data centers and other data-heavy or performance-critical applications,” said Nikos Zervas, chief executive officer for CAST. “Running this industry-leading GZIP accelerator on the Intel PAC with the Intel Acceleration Stack provides a significant win for customers needing faster data compression and decompression.”
“Intel is collaborating with a growing ecosystem of partners in our DSN program to bring new data center accelerator functions such as CAST’s GZIP data compression to our customers seeking options to accelerate workloads,” said Reynette Au, vice president of marketing, Intel Programmable Solutions Group. “Customers and end users can benefit with faster time to market by using IP from CAST and the larger ecosystem built around our Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA.”
The CAST GZIP Accelerator is available now from CAST (www.cast-inc.com). Learn more about the accelerator function or the Intel FPGA DSN program at www.altera.com/dsn.
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related News
- CAST and PLDA GROUP Demonstrate x86-Compliant High Compression Ratio GZIP Acceleration on FPGA, Accessible to non-FPGA Experts Using the QuickPlay Software Defined FPGA Development Tool
- OVH and Accelize Demonstrate the Value of FPGAs in the Cloud with GZIP Compression, from CAST, Achieving Acceleration Factors of >100x
- Kalray and Arm to collaborate to bring data intensive processing and AI acceleration DPU solutions to the global Arm ecosystem
- Achronix Releases Groundbreaking Speedster AC7t800 Mid-Range FPGA, Driving Innovation in AI/ML, 5G/6G and Data Center Applications
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers