Atomic Rules Becomes a Community Member of the Open Core Protocol International Partnership
AUBURN, NH - January 5, 2009 - Atomic Rules LLC announced today that it has joined the Open Core Protocol International Partnership (OCP-IP) as a community member, to actively participate in the implementation and evolution of the standard.
"There are many tough challenges in building complex digital systems, naming the signals that interconnect IP cores should not be one of them", said Shep Siegel, CTO of Atomic Rules.
By joining OCP-IP, Atomic Rules hopes to elevate conventional RTLs, which can be plagued by weakly-defined implicit assumptions; to the less error-prone, correct-by-construction, standard calling conventions of Bluespec SystemVerilog (BSV).
Atomic Rules LLC is a New Hampshire based consultancy that provides strategic capabilities for reconfigurable computing.
www.atomicrules.com
"There are many tough challenges in building complex digital systems, naming the signals that interconnect IP cores should not be one of them", said Shep Siegel, CTO of Atomic Rules.
By joining OCP-IP, Atomic Rules hopes to elevate conventional RTLs, which can be plagued by weakly-defined implicit assumptions; to the less error-prone, correct-by-construction, standard calling conventions of Bluespec SystemVerilog (BSV).
Atomic Rules LLC is a New Hampshire based consultancy that provides strategic capabilities for reconfigurable computing.
www.atomicrules.com
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- MIPI SoundWire I3S Peripheral IP
- LPDDR6/5X/5 Controller IP
- Post-Quantum ML-KEM IP Core
- MIPI SoundWire I3S Manager IP
Related News
- Atomic Rules Joins the 25 Gigabit Ethernet Consortium
- BittWare and Atomic Rules announce an FPGA-based UDP Offload Engine IP Core for 10/25/50/100 GbE
- Atomic Rules announces DPDK-aware FPGA/GPP data mover
- Atomic Rules launches TimeServo System Timer IP Core for FPGA
Latest News
- SEALSQ and IC’Alps Unify Expertise to Deliver Integrated Post-Quantum Cybersecurity and Functional Safety for Autonomous Vehicles
- PUFsecurity’s PUFrt Anchors the Security of Silicon Labs’ SoC to Achieve the Industry’s First PSA Certified Level 4
- The next RISC-V processor frontier: AI
- PQShield joins EU-funded FORTRESS Project: Pioneering Quantum-Safe Secure Boot for Europe’s Digital Future
- PQSecure Achieves NIST CAVP Validation