ATMOS Corporation Achieves Superior Soft Error Rate Results for SoC-RAM High-Density 1T Embedded Memory at TSMC Test Lab
SoC-RAM"s superior soft error rate ensures reliability, robust macrocell design for high-performance, high-permanency SoC product applications
OTTAWA--(BUSINESS WIRE)--May 6, 2002-- System-on-a-chip designs for high-performance, high-permanency applications will benefit from the robust design and high reliability of ATMOS SoC-RAM(TM), which has achieved superior soft error results for 1T embedded memory in the 0.18 micronsm technology node at TSMC"s test facility in Hsin-Chu, Taiwan. Measured onsite at TSMC using the industry"s baseline SER test lab for embedded memory, SoC-RAM exhibited less than 800 failures in time (FITs) per megabit, and is comparable to that of embedded SRAM at 0.18 micronsm.
Soft errors are non-permanent failures that occur in all integrated circuits and are due to the impact of alpha particles and cosmic ray influx - environmental occurrences that can alter the state of a single bit of data. SER in embedded memory has become a growing concern in deep sub-micron processes as metal oxide layers become increasingly thin, providing a weaker barrier between the gate and substrate. Cell capacitance, memory area and access rates are also factors in the SER performance of embedded memory.
In 0.13 micronsm and below, the SER of SRAMs exceeds that of SoC-RAM manufactured in standard logic processes by approximately 2x, while SoC-RAM manufactured in merged logic-DRAM is virtually immune to soft errors. SoC-RAM, based on a single-transistor (1T) DRAM cell, is unique in that its regular refresh cycles can be used to correct soft failures before they become multi-bit failures. SoC-RAM also employs a number of techniques to further minimize the effect of soft errors, including redundancy, shorter access times, a variety of manufacturing technology options (including planar, stack and trench), and trusted memory product options including error correcting code (ECC) and built-in self-test, diagnostic and repair (BISTDR) techniques.
For detailed SER information, a comprehensive SER white paper is available for download from the ATMOS web site, at http://www.atmoscorp.com/resource_centre/knowledge_center.php.
About ATMOS
ATMOS Corporation is a semiconductor memory company focused on embedded high-density one-transistor memory products for system-on-a-chip (SoC) applications in networking, wireless, graphics and imaging markets.
ATMOS develops SoC-RAM(TM) embedded memory cores that:
- Are based on very dense 1-transistor,1-capacitor technology
Consume up to ten times less power than traditional SRAM
Require up to ten times less die area than traditional SRAM
Exhibit very low susceptibility to soft errors
Are compiled, with design files available in just days
Include a trusted-memory error correcting code (ECC) option
Fully compiled SoC-RAM macrocells are available in 0.18 micronsm and 0.13 micronsm, with front-end views for 90nm macrocells available summer 2002.
For more information visit www.atmoscorp.com or call toll-free +1.866.EMB.DRAM.
Contact:
ATMOS Corporation
Maria Ford, +1.831.5005 x.205
mford@atmoscorp.com
or
Maestro Marketing & PR
Barbara Kalkis, +1.408.996.8534
kkalkis@compuserve.com
Related Semiconductor IP
- Temperature Glitch Detector
- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
Related News
- iRoC Technologies Introduces SERPRO Services for Transistor-level Soft Error Rate Analysis and Optimization
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Philips Selects ATMOS 1T SoC-RAM Compiled, High-density 1T Embedded Memory.
- Artisan Components’ Memories And iRoC’s M-RoCKIT Platform Enable Building Of Soft Error Free Memories
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing