Arteris Adds Support for ARM AMBA 5 AHB5 Protocol
ARM TechCon 2016, SANTA CLARA, Calif. — Oct. 25, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has implemented ARM® AMBA® 5 Advanced High-Performance Bus 5 (AHB5) protocol support in its FlexNoC Interconnect IP and Ncore Interconnect IP products.
The AHB5 specification is an update to the previous ARM AMBA 3 AHB specification. It provides support for the ARMv8-M architecture, adding features that extend ARM TrustZone® technology support throughout the SoC.
“ARM and its rich ecosystem enable rapid deployment of complete solutions for secure smart embedded devices and accelerating delivery to market,” said Nandan Nayampally, vice president of marketing and strategy, CPU group, ARM. “Arteris’ support of AHB5 is another demonstration of how ARM’s ecosystem helps to simplify and foster the development of secure Internet of Things devices.”
“Arteris has been an enthusiastic supporter of ARM AMBA specifications since our inception, implementing the ARM AMBA 3, 4 and 5 specifications within our interconnect IP products,” said K. Charles Janac, President and CEO of Arteris. “We are strongly committed to supporting the advancement of ARM interconnect standards on a long-term basis to enable semiconductor design teams to more easily create SoCs using IP from the ARM ecosystem.”
About Arteris
Arteris, Inc. provides system-on-chip (SoC) interconnect IP and tools to accelerate SoC semiconductor assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as Samsung, Huawei / Hisilicon, Mobileye, Altera, and Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at www.arteris.com.
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related News
- Cadence Announces Verification IP for ARM AMBA 5 AHB5
- Silistix Self-Timed Interconnect Solution Supports AMBA Bus Protocol
- Sonics Offers Free Evaluation for Designers of Sonics Network for AMBA Protocol Solution
- Sonics Network for AMBA Protocol Now Available for Windows
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers