Vector Graphics IP core supporting OpenVG1.1 subset
Vector graphics IP core with the world’s smallest logic size, realizing a further cost reduction of embedded devices that require…
- GPU
- Silicon Proven
- Now
- OpenVG 1.1
Vector Graphics IP core supporting OpenVG1.1 subset
Vector graphics IP core with the world’s smallest logic size, realizing a further cost reduction of embedded devices that require…
GV380S and GV380T are Gen 4 2D (vector graphics) GPU IPs.
High-performance and low-power 2D vector graphics IP core
High-performance and low-power 2D vector graphics IP core for embedded devices.
Vivante 2.5D GPU series is designed specifically for MCU and MPU applications that require hardware accelerated UI displays and e…
2.5D GPU IP Core - API Support: Vector Graphics, VGLite API
The 2.5D GPU series is designed specifically for MCU and MPU applications that require hardware accelerated UI displays and effec…
GV580 is a Gen 4 2D (vector graphics) GPU IP with 3D drawing functions.
Shader architecture type 3D GPU Integrating the OpenVG 1.1 hardware processing pipeline
GSV3100 is a graphics processor IP conformant to OpenGL ES2.0/1.1 and OpenVG1.1.
The D/AVE HD 2.5D GPU family is an evolution of the D/AVE 2D family supporting high quality 2D and 3D rendering for displays up t…
D/AVE 2D is a 2D GPU Hardware IP Core, optimized for easy integration into FPGAs and ASICs.
2D Graphics Hardware Accelerator (AXI4 Bus)
The DB9200AXI4 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Generates bitmaps fr…
2D Graphics Hardware Accelerator (AHB Bus)
The Digital Blocks DB9200AHB 2D Graphics Hardware Accelerator Verilog IP Core renders graphics frames as follows: Generates bitma…
2D Graphics Hardware Accelerator (AXI Bus)
The Digital Blocks DB9200AXI 2D Graphics Hardware Accelerator / Engine Verilog IP Core renders graphics frames as follows: Genera…
ARC EM9D 32-bit DSP Enhanced Processor core based on the ARCv2DSP ISA with CCM and XY Memory
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
ARC EM11D Enhanced 32-bit processor core, ARCv2DSP ISA with Cache and XY Memory
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
ARC EM7D DSP Enhanced 32-bit processor core with caches, ARCv2DSP ISA, for low power embedded DSP ap
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
ARC EM5D Enhanced 32-bit processor core, ARCv2DSP ISA, for low power embedded DSP applications
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
ARC HS47D 32-bit, dual-issue processor core, ARCv2DSP ISA, with 100+ DSP instructions and I&D cache
The DSP-enhanced ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Ar…
Multi-Channel Streaming DMA Controller
The MC-SDMA IP core implements a configurable, bandwidth-efficient, and easy-to-use Direct Memory Access (DMA) controller that tr…