DPU for Convolutional Neural Network
Xilinx, Inc.
•
HQ:
USA
The Xilinx® Deep Learning Processor Unit (DPU) is a programmable engine dedicated for convolutional neural network.
- NPU
Compare 27 VDPU IP Listing from 18 vendors
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LogikHaus Sdn. Bhd.• HQ: Malaysia
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
- Video Processing
- V3.0
- Two Weeks
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LogikHaus Sdn. Bhd.• HQ: Malaysia
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
- Video Processing
- V1.0
- Two Weeks
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LogikHaus Sdn. Bhd.• HQ: Malaysia
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
- Video Processing
- V2.6
- Two Weeks
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LogikHaus Sdn. Bhd.• HQ: Malaysia
Video Processing Unit IP The VPU IP is a video processing system that is suitable for high-speed and high resolution video system…
- Video Processing
- V3.0
- Two Weeks
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Syntacore• HQ: Cyprus
SCR9 is a high-performance, silicon-proven, Linux-capable 64-bit RISC-V processor core for entry-level server-class applications …
- Coherency
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64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
Andes Technology Corp.• HQ: R.O.CAndesCore™ AX46MP(V) 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeS…
- CPU
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32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
Andes Technology Corp.• HQ: R.O.CAndesCore™ A46MP(V) 32-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSt…
- CPU
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Neoverse Compute Subsystems N3 (CSS N3)
Arm Ltd.• HQ: Great BritainThe Performance-per-Watt Arm Neoverse N3 Platform Validated by Arm for Networking and Edge Markets configurable to target 5G, DPU…
- CPU
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64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
Andes Technology Corp.• HQ: R.O.CAndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSta…
- CPU
- Now
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64-bit CPU with RISC-V Vector Extension
Andes Technology Corp.• HQ: R.O.CThe 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the …
- CPU
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AI DSA Processor - 9-Stage Pipeline, Dual-issue
Nuclei System Technology• HQ: ChinaNI900 is a DSA processor based on 900 Series.
- Edge AI Accelerator
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Fully-custom RISC-V Vector Unit
Semidynamics Technology Services• HQ: SpainOnly 100% customisable RISC-V Vector Unit Can be licensed alone or paired with Atrevido and Avispado What is a Vector Unit?
- DSP Core
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High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP
RiVAI Technology Co., Ltd.• HQ: China, ??World's first audio DSP IP with RISC-V Vector processor architecture RiVAI-V1 is a dual-issue, Out-of-Order execution, 7-stage pi…
- DSP Core
- golden,silicon_proven
- now
- RISC-V RV32IMAC(F)V(P)
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TSMC CLN12FFC 12-bit 16GHz Current Steering DAC
Global UniChip Corp. (GUC)• HQ: TaiwanIGADACV01A is a high speed current steering type digital-to-analog converter with 12-bit resolution.
- TSMC
- 12nm
- FFC
- Silicon Proven
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TSMC CLN12FFC 12-bit 500MHz Current Steering DAC
Global UniChip Corp. (GUC)• HQ: TaiwanIGADACV02A is a general-purpose 3-channel digital-to-analog converter with 12-bit resolution.
- TSMC
- 12nm
- FFC
- Pre-Silicon
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Scalable Edge NPU IP for Generative AI
Ceva, Inc.• HQ: USACeva-NeuPro-M is a scalable NPU architecture, ideal for transformers, Vision Transformers (ViT), and generative AI applications, …
- NPU
- Available
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High Performance 64-bit RISC-V Processor
StarFive• HQ: ChinaDubhe-90 is a high-performance commercial RISC-V CPU Core IP that is deliverable.
- CPU
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RVA23, Multi-cluster, Hypervisor and Android
Andes Technology Corp.• HQ: R.O.CAndesCore™ AX66 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on An…
- CPU
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Home Plug Green PHY MAC Layer TX/RX
Noesis Technologies• HQ: GreecentHPGP_MAC IP core implements “Connectionless CSMA-Only Level-0 CCo“ MAC Layer functionality with Passive Coordination, as detail…
- TSMC
- 28nm
- Silicon Proven