Gigabit Ethernet PHY
- Single-Protocol PHY
- Silicon Proven
- Q2, 2024
Gigabit Ethernet PHY
Gigabit Ethernet PHY
Gigabit Ethernet PHY
Gigabit Ethernet PHY (in production)
Gigabit Ethernet PHY (Modification Right)
Gigabit Ethernet PHY Modification Right (in production)
10BASE-T/100BASE-TX/100BASE-FX/1000BASE-T Gigabit Energy Efficient Ethernet PHY; UMC 28nm HPC+/LOW_K process
10BASE-T/100BASE-TX/100BASE-FX/1000BASE-T Gigabit Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
Gigabit Ethernet with IEEE 1588 and AVB
The Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3-2008 standard and supports protocol ext…
10 Gigabit Ethernet MAC IP Core
The 10 Gigabit Ethernet (XGMAC) IP core is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface between…
Xilinx provides a GMII to RGMII LogiCORE for connecting to the Zynq-7000 integrated Ethernet MAC The Xilinx LogiCORE™ IP Gigabit …
Serial Gigabit Media Independent Interface (SGMII)
SGMII (Serial Gigabit Media Independent Interface) IP is a high-speed serial interface developed to connect a Gigabit Ethernet MA…
The AL_EMAC_CORE Ethernet MAC Core is hardware implementation of Ethernet protocol defined by IEEE 802.3-2005 Specification.
The silicon-proven Gigabit Ethernet IP core provides a 10/100 Mbps Media Independent Interface (MII) and a 1000 Mbps Gigabit Medi…
Gigabit Ethernet Media Access Control (MAC) SystemVerilog OVC VIP is fully documented,off-the-shelf component for the Developers …
The 10 Gigabit Ethernet (10 GbE) Physical Coding Sublayer (PCS) solution from Lattice Semiconductor enables creation of system so…
UltraScale+ Integrated 100G Ethernet Subsystem
Xilinx offers an integrated 100 Gigabit per second (Gbps) Ethernet Media Access Controller (MAC), Physical Coding Sublayer (PCS),…
UltraScale Integrated 100G Ethernet Subsystem
Xilinx offers an integrated 100 Gigabit per second (Gbps) Ethernet Media Access Controller (MAC) and Physical Coding Sublayer (PC…
UltraScale Integrated 100G Ethernet MAC/PCS
Xilinx offers an integrated 100 Gigabit per second (Gbps) Ethernet Media Access Controller (MAC) and Physical Coding Sublayer (PC…
Ethernet PCS 1G/2.5G/5G/10G/25G & CPRI 7.0
A combined silicon agnostic implementation of the PCS layer compliant with Ethernet standard IEEE 802.3-2018 and CPRI Specificati…
Simulation VIP for Ethernet up to 800G
Mature and capable compliance verification solution.Incorporating the latest protocol updates, the mature and comprehensive Caden…