Anti-fuse OTP on 90nm CIS IP Listing

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• GlobalFoundries
• 22nm
• FDX

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• TSMC
• 7nm
• N7

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• TSMC
• 6nm
• N6

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• TSMC
• 5nm
• N5A

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• eFuse / OTP

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• TSMC
• 4nm
• N4P

Designers face the challenge of creating secure, cost-effective, low power, and reliable SoC designs.

• GlobalFoundries
• 22nm
• FDX

Data protection from safeguarded anti-fuse OTP memory Secure OTP is a combined Physical Macro, and Digital RTL providing comprehe…

• eFuse / OTP