Serial ATA (SATA) PHY Transceiver IP
SMS6000 is a fully integrated CMOS transceiver that handles the low level Serial ATA protocol and signaling.
Dual Serial ATA 1.5/3.0/6.0 Gbps Phy
TRC6002CSA is a Dual Serial ATA (SATA) Host PHY core for interfacing serial data between Storage Device and external 2-port PHY.
Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core
TRC3002CSA is a Dual Serial ATA (SATA) PHY core for interfacing serial data between Storage Device and external 2-port PHY.
Serial ATA I/II/III Host Controller IP Core Compliance Certified by UNH Labs
The Serial ATA Host Controller IP Core provides an interface to highspeed serial link replacements for the parallel ATA attachmen…
SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Over sampling 1 port 3G/1.5G SATA PHY, UMC 0.13um HS+LL/FSG Logic process.
Serial ATA I/II Device Controller IP Core
The Serial ATA Device Controller IP Core provides an interface to high-speed serial link replacements for the parallel ATA attach…
SATA 6G PHY in GF (40nm, 28nm)
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
SATA 6G PHY in UMC (40nm, 28nm, 22nm)
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
SATA 6G PHY in TSMC (40nm, 28nm, 16nm, 12nm, N7)
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
SATA 6G PHY in SMIC (40nm, 28nm)
The Synopsys IP solution for Serial ATA (SATA) provides the necessary logic to implement and verify designs using the SATA interf…
The SATA 6G PHY is a mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip integration into SA…
SATA II PHY IP, UMC 55nm SP process
Serial ATA I, II PHY, UMC 55nm SP/RVT Low-K Logic process.
SATA II PHY IP, UMC 0.13um HS/FSG process
3G/1.5G Serial ATA PHY, UMC 0.13um HS/FSG Logic process.
SATA II PHY IP, UMC 0.11um HS/FSG process
3G/1.5G Serial ATA PHY, UMC 0.11um HS/FSG Logic process.
SATA III PHY IP, Gen-3, UMC 55nm SP process
Serial ATA I, II, III PHY, UMC 55nm SP/RVT Low-K Logic process.
SATA III PHY IP, Gen-3, UMC 0.11um HS/FSG process
6G/3G/1.5G Serial ATA PHY, UMC 0.11um HS/FSG Logic process.
SATA II PHY IP, Gen-2, UMC 90nm SP process
Serial ATA I II PHY, UMC 90nm SP/RVT Low-K Logic process.
SATA II PHY IP, Gen-2, UMC 0.11um HS/AE process
3G/1.5G Serial ATA PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process.
SATA II PHY IP, Gen-2, 1 - port, UMC 0.18um G2 process
1.5G/3.0Gbps 1 port Serial ATA PHY and ESATA, UMC 0.18um GII Logic process.
SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Serial ATA (SATA) physical layer that provides a range of host and device functions, UMC 0.13um HS/FSG Logic process.