Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV Low Power Low-K process synchronous high density, Single Port SRAM compiler with row redundancy option.
- UMC
- 55nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV Low Power Low-K process synchronous high density, Single Port SRAM compiler with row redundancy option.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM memory compiler with row Redundancy.
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303RVT cell peripheral LVT.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler LVT with row redundancy.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM memory compiler with row redundancy.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler with LVT peripheral.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/HVT Logic process with 6TSRAM (0.242 mm2) Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Ultra high speed Single Port SRAM memory compiler with Redundancy.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303HVT cell peripheral LVT.
Single Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um LL process
UMC 0.18um Logic process high density, Low Power, mini area, Single Port SRAM compiler.
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous, UMC 0.18um eFlash/G2 process
UMC 0.18um eFlash process GII 4.0um2 Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um HV process
UMC 0.11um HV process 1.35um2 Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um EEPROM process
UMC 0.11um EE2PROM/LL 1.5V high density Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE Logic process Synchronous Single Port SRAM memory compiler with 1.41um2-Bit cell.
Single Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash Single Port SRAM.
Single Port SRAM Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Enhancement) Logic process Single Port SRAM compiler with 141-Bit cell.
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process 1.41um2 Cell Single Port SRAM compiler.
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Dual Port SRAM with redundancy feature.
Dual Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Dual Port SRAM memory compiler.