Specialty OSC IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process 2.5V low frequency OSC Pad.
- UMC
- 90nm
- LL
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Specialty OSC IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process 2.5V low frequency OSC Pad.
Specialty OSC IO IP, UMC 90nm LL process
UMC 90nm LL/RVT process 2.5V high frequency OSC Pad.
Specialty OSC IO IP, 1MHz to 66MHz, UMC 55nm LP process
UMC 55nm LP/RVT Logic process OSC High IO Library.
Specialty OSC IO IP, BOAC (Bonding Over Active Circuit), UMC 40nm LP process
UMC 40nm LP/RVT Logic process high frequency OSC BOAC IO.
LVDS Transmitter IP, 85MHz, UMC 55nm SP process
1.8V/3.3V 85MHz 35:5 LVDS Transmitter, UMC 0.18um GII Logic process.
LVDS Transmitter IP, 700Mbps, UMC 90nm SP process
3.3V LVDS Transmitter 700Mbps, UMC 55nm SP/RVT Low-K process.
LVDS Transmitter IP, 700Mbps, UMC 55nm SP process
2.5V LVDS Transmitter 700Mbps, UMC 40nm LP Low-K Logic process.
LVDS Transmitter IP, 700Mbps, UMC 0.13um SP/FSG process
3.3V LVDS Transmitter 700Mbps, UMC 90nm SP/RVT low-L process.
LVDS Transmitter IP, 1200Mbps, UMC 55nm SP process
1.8V Sub-LVDS Transmitter 1200Mbps, UMC 40nm LP/RVT Logic process.
LVDS Transmitter IP, 8MHz - 100MHz, 4 channels, UMC 0.18um G2 process
3.3V 4 channel LVDS Transmitter 8~100MHz, UMC 90nm SP/RVT Low-K process.
LVDS Receiver IP, 20MHz - 135MHz , UMC 0.18um HS/FSG process
20M~135MHz DLL-based LVDS RX, UMC 0.13um HS/FSG process.
Specialty DDR IO IP, DDR2/DDR1/MDDR, UMC 0.11um HS/AE process
UMC 0.11um AE/HS Logic process DD1/DDR2 combo MDDR IO Cell Library.
General Purpose Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 55nm eFlash process
UMC 55 nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate process 1.8V/2.5V/3.3V Multi-Voltage BOAC IO Cell Library.
General Purpose Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 1.8V/2.5V/3.3V Multi-Voltage BOAC IO Cell Library.
UMC 40nm LP/RVT Logic process 5V Tolerance Generic POC IO with BOAC solution.
General Purpose IO IP, BOAC (Bonding Over Active Circuit), UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 1.8V BOAC IO Cell Library (with customized PU/PD function).
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Logic process true 1.0/3.3V standard IO Cell Library (3.3V Generic IO).
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Logic process true 1.0/3.3V standard IO Cell Library (3.3V Analog IO).
General Purpose IO IP, True 3.3V, UMC 90nm SP process
UMC 90nm SP/RVT process true 3.3V standard IO Cell Library Using 3.3V GOX52 IO.
General Purpose IO IP, UMC 90nm SP process
UMC 90nm SP/RVT Logic process TRUE 2.5V Generic IO Library.