ROM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Via1 ROM compiler with HVT.
- UMC
- 55nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
ROM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Via1 ROM compiler with HVT.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP via1 ROM compiler with Sleep mode & peripheral LVT.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP Via1 ROM compiler with Sleep mode.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Via ROM compiler with peripheral LVT and WL booster.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Via ROM compiler with WL booster.
ROM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K Via ROM compiler.
ROM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process PG-Via1 ROM compiler with LVT.
ROM Compiler IP, UMC 0.25um SP process
UMC 0.25um Logic process synchronous high speed diffusion programmed ROM memory compiler.
ROM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Low Power VIA2 programmed ROM memory compiler.
ROM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous diffusion programmed ROM memory compiler.
ROM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous VIA2 programmed ROM memory compiler.
ROM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Diffusion ROM memory compiler.
ROM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous VIA2 programmable ROM memory compiler.
ROM Compiler IP, UMC 0.18um LL process
UMC 0.18um LL Logic process synchronous VIA1 programmed ROM memory compiler.
ROM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous VIA1 ROM memory compiler.
ROM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous VIA1 programmed ROM memory compiler.
ROM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous VIA1 programmed ROM memory compiler.
ROM Compiler IP, UMC 0.13um LL process
UMC 0.13um 1.2V low leakage Logic process synchronous VIA1 ROM memory compiler.
ROM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um Logic HS FSG process Low Power synchronous VIA1 programmed ROM memory compiler.
ROM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process synchronous Via-1 ROM memory compiler.