Standard Cell (Generic) Library IP, RVT, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process Standard Cell Library.
- UMC
- 40nm
- LP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Standard Cell (Generic) Library IP, RVT, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process Standard Cell Library.
Standard Cell (Generic) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic process 9-Track Standard Generic Core Cell Library (C30).
Standard Cell (Generic) Library IP, RVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C40).
Standard Cell (Generic) Library IP, RVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C35).
Standard Cell (Generic) Library IP, RVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C30).
Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic process 12-Track Standard Generic Core Cell Library (C30).
Standard Cell (Generic) Library IP, LVT, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process Standard Cell Library.
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 9-Track Standard Generic Core Cell Library (C38).
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 9-Track Standard Generic Core Cell Library (C30).
Standard Cell (Generic) Library IP, LVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 9-Track Standard Generic Core Cell Library (C35).
Standard Cell (Generic) Library IP, LVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C40).
Standard Cell (Generic) Library IP, LVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C35).
Standard Cell (Generic) Library IP, LVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library (C30).
Standard Cell (Generic) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 12-Track Standard Generic Core Cell Library (C30).
Standard Cell (Generic) Library IP, 10-track, HVT, UMC 90nm SP process
UMC 90nm Low-K SP/HVT Standard Core Cell Library.
Standard Cell (Generic) Library IP, HVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 9-Track Generic Core Cell Library (C38).
Standard Cell (Generic) Library IP, HVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 9-Track Generic Core Cell Library.
Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library C40.
Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library C35.
Standard Cell (Generic) Library IP, HVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library C30.