Global Foundries 55nm LowPower LowK Process synchronous high density low power single port SRAM memory compiler.
- GlobalFoundries
- 55nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Global Foundries 55nm LowPower LowK Process synchronous high density low power single port SRAM memory compiler.
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy.
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
UMC 80nm HV Process Single-Port SRAM Memory Compiler with redundancy
UMC 80nm HV Process Single-Port SRAM Memory Compiler with redundancy
UMC 80nm HV Process PG Single-Port SRAM Memory Compiler_x005F_x000D_
UMC 80nm HV Process PG Single-Port SRAM Memory Compiler
UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler.
UMC 0.11um eFlash LL process ULL High Density Single-Port SRAM
UMC 0.11um eFlash LL process ULL High Density Single-Port SRAM
UMC 0.11um BCD High Voltage Process Synchronous Via1 Programmable ROM Compiler
UMC 0.11um BCD High Voltage Process Synchronous Via1 Programmable ROM Compiler
UMC 0.11um BCD process;Single-Port SRAM compiler
UMC 0.11um BCD process;Single-Port SRAM compiler
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
28nm HPM 1PRF with peri -LVT
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process 2PRF with LVT and Bank 2
UMC 28nm HPC process 2PRF with LVT and Bank 2
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process 2PRF, HVT & Bank2
UMC 28nm HPC process 2PRF, HVT & Bank2
UMC 28nm HPC process PG Two Port Register File with peri-HVT
UMC 28nm HPC process PG Two Port Register File with peri-HVT
UMC 28nm HPC process PG-2PRF with Bank4
UMC 28nm HPC process PG-2PRF with Bank4