On-chip ESD/EOS/Latch up protection for advanced and low voltage processes
Scalable on-chip HBM (MM) levels Some applications need higher ESD robustness levels.
- ESD Protection
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
On-chip ESD/EOS/Latch up protection for advanced and low voltage processes
Scalable on-chip HBM (MM) levels Some applications need higher ESD robustness levels.
The Alcyon Photonics PIP core© portfolio ranges from single components (building blocks) to topologies (circuits).
BANDGAP POR & APC Advanced Power Controller with Power on Reset (Vin=1.08-1.98V)
The SGC21412 is a versatile and scalable Power Controller for SoC integration.
Support Frequency 218.75MHz - 14GHz 13GHz - 15GHz
Physical interface for CSI-2 and DSI providing 2.5Gbps per lane of bandwidth Arasan’s MIPI D-PHY Analog Transceiver IP Core is fu…
Physical interface for CSI-2 providing 5.7Gbps per lane of bandwidth The MIPI C-PHY V1.0 improves throughput over a bandwidth-lim…
Temperature Sensor on Samsung 14LPE
The temperature sensor is a integrated macro for monitoring temperature variation on-chip, allowing very high precision even in u…
The PVT Sensor is a integrated macro for monitoring process, voltage, and temperature variation on-chip, allowing very high preci…
The PVT Sensor is a integrated macro for monitoring process, voltage, and temperature variation on-chip, allowing very high preci…
NIST’s ASCON Lightweight Crypto Algorithm Accelerator
The ASCON-IP-41 is an efficient implementation of NIST’s lightweight crypto algorithm family ASCON.
Single-core video encoder - AV1, HEVC, AVC
Single-core video encoder - AV1, HEVC, AVC
Single-core video decoder - AV1, HEVC, AVC, VP9
Single-core video decoder - AV1, HEVC, AVC, VP9
Single-core video encoder - AV1, HEVC, AVC, VP9
Single-core video encoder - AV1, HEVC, AVC, VP9
Single-core video encoder - AV1, HEVC, AVC
Single-core video encoder - AV1, HEVC, AVC
Image Signal Processor IP Core
This is an IP core for the ISP (Image Signal Processor) that processes image data input from the image sensor.
ARC IoT Communications IP Subsystem
IP
Agile PQC Public Key Accelerator
Quantum computers will solve some of the most complex problems in minutes versus the potentially thousands of years that classica…
TSMC N3P 1.8V IO Platform supporting cells
TSMC N3P 1.8V IO Platform supporting cells
High Speed Data Bus (HSDB) IP Core
PHY and Mac layer hardware implementation for HSDB.
Temperature Sensor IP