TSMC CL013LVOD 130nm Clock Generator PLL - 220MHz-1100MHz
True Circuits, Inc.
•
HQ:
USA
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 130nm
- LVOD
Compare 3,564 PLL IP Listing from 105 vendors
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TSMC CL013LVOD 130nm Clock Generator PLL - 110MHz-550MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 130nm
- LVOD
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TSMC CLN90G 90nm Clock Generator PLL - 320MHz-1600MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 90nm
- G
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TSMC CL013LVOD 130nm Clock Generator PLL - 440MHz-2200MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 130nm
- LVOD
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UMC L130SP 130nm Spread Spectrum PLL - 236MHz-1180MHz
True Circuits, Inc.• HQ: USAThe Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
- UMC
- 130nm
- SP
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UMC L130SP 130nm Spread Spectrum PLL - 118MHz-590MHz
True Circuits, Inc.• HQ: USAThe Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
- UMC
- 130nm
- SP
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UMC L130SP 130nm Spread Spectrum PLL - 59MHz-295MHz
True Circuits, Inc.• HQ: USAThe Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
- UMC
- 130nm
- SP
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UMC L130SP 130nm Clock Generator PLL - 236MHz-1180MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- UMC
- 130nm
- SP
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UMC L130HS 130nm Clock Generator PLL - 160MHz-800MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- UMC
- 130nm
- HS
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UMC L130HS 130nm Clock Generator PLL - 80MHz-400MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- UMC
- 130nm
- HS
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UMC L130SP 130nm Deskew PLL - 118MHz-590MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 130nm
- SP
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UMC L150HS 150nm Deskew PLL - 140MHz-700MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 150nm
- HS
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UMC L180G 180nm Deskew PLL - 200MHz-1000MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 180nm
- G
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UMC L150HS 150nm Deskew PLL - 280MHz-1400MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 150nm
- HS
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UMC L130SP 130nm Deskew PLL - 236MHz-1180MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 130nm
- SP
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UMC L130HS 130nm Deskew PLL - 320MHz-1600MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- UMC
- 130nm
- HS
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TSMC CL018G 180nm Deskew PLL - 220MHz-1100MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 180nm
- G
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TSMC CL018E 180nm Deskew PLL - 260MHz-1300MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 180nm
- E
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TSMC CL015G 150nm Deskew PLL - 260MHz-1300MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 150nm
- G
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TSMC CL015LV 150nm Deskew PLL - 280MHz-1400MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 150nm
- LV