DDR23 COMBO PHY compensation Block ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY compensation Block ; UMC 40LP/RVT LowK Logic Process with 2.5V device
- Controller + PHY + 1
- DDR2
- UMC
- 40nm
- LP
- Pre-Silicon
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
DDR23 COMBO PHY compensation Block ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY compensation Block ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR2/3 COMBO Compensation block (2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Porcess
DDR2/3 COMBO Compensation block (2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Porcess
Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant with DFI spec); UMC 40nm LP LowK …
Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application;UMC 55nm SP/RVT LowK PROCESS.
Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process
Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm LP/RVT LowK Logic Process
Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm LP/RVT LowK Logic Process
Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process
Command/Address Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device for 2 layer PCB board usage
DDR3/2 COMBO PHY CMD/ADDR BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process
DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process
DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process
DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process
DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process
DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process
DDRII Data Block for Chip Application; UMC 0.13um HS/FSG Logic Process
DDRII Data Block for Chip Application; UMC 0.13um HS/FSG Logic Process
DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process
DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process
DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process
DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process
DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process
DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process
DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process
DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process
DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process
DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process
Data block of 1:2 DDR2-PHY ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Data block of 1:2 DDR2-PHY ; UMC 0.11um HS/AE (AL Enhancement) Logic Process