UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
- UMC
- 28nm
- HPC
- Pre-Silicon
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 40nm LP/RVT Logic Process 1.8V ONFI 3.2 BOAC I/O cell library
UMC 40nm LP/RVT Logic Process 1.8V ONFI 3.2 BOAC I/O cell library
UMC 0.11um SP/AE (AL Advanced Enhancement) Logic Process High-Freq. OSC BOAC I/O.
UMC 0.11um SP/AE (AL Enhancement) Logic Process High-Freq.
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic Process High-Freq0. OSC BOAC I/O.
UMC 0.11um LL/AE (AL Enhancement) Logic Process High-Freq0.
UMC 55nm uLP LowK Logic Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library
UMC 55nm uLP LowK Logic Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library
UMC 55nm uLP LowK Logic Process Ture 3.3V Low Frequency OSC IO Cell Library
UMC 55nm uLP LowK Logic Process Ture 3.3V Low Frequency OSC IO Cell Library
UMC 55nm ULP LowK Logic Process Ture 3.3V high Frequency OSC IO Cell Library
UMC 55nm ULP LowK Logic Process Ture 3.3V high Frequency OSC IO Cell Library
UMC 55nm e-flash Logic Process OSC High IO Library
UMC 55nm e-flash Logic Process OSC High IO Library
UMC 0.11um AE/HS logic process Multi-Voltage BOAC SD3.0 I/O Cell library
UMC 0.11um AE/HS logic process Multi-Voltage BOAC SD3.0 I/O Cell library
UMC 0.11um HS/AE (AL Enhancement) Logic Process BOAC Multi-voltage IO with Power-on Tri-state/Low Function.
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library
UMC 55nm Logic and Mixed-Mode Ultra Low Power Low-K Process 1.8V/2.5V/3.3V multi-voltage BOAC I/O cell library
UMC 55nm SP-RVT 1P10M Logic Process 1.8V/3.3V multi-voltage BOAC I/O cell library
UMC 55nm SP-RVT 1P10M Logic Process 1.8V/3.3V multi-voltage BOAC I/O cell library
UMC 90nm LL/RVT process MULTI-VOLTAGE GENERIC I/O CELL USING 3.3V GOX52 IO
UMC 90nm LL/RVT process MULTI-VOLTAGE GENERIC I/O CELL USING 3.3V GOX52 IO
UMC 0.13um HS/FSG Logic Process BOAC Multi-voltage IO with Power-on Tri-state/Low Function.
UMC 0.13um HS/FSG Logic Process BOAC Multi-voltage IO with Power-on Tri-state/Low Function.
UMC 28nm Logic and Mixed-Mode Low-K HPC Process 1.8V BOAC I/O Cell library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process 1.8V BOAC I/O Cell library
UMC 55nm uLP LowK Logic Process Ture 3.3V Generic IO Cell Library
UMC 55nm uLP LowK Logic Process Ture 3.3V Generic IO Cell Library