The CONV_YC IP Core is a fully pipelined chroma resampler that converts pixels between 4:4:4 and 4:2:2 formats in the YCbCr colou…
- Video Processing
- Immediate
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The CONV_YC IP Core is a fully pipelined chroma resampler that converts pixels between 4:4:4 and 4:2:2 formats in the YCbCr colou…
The CSC IP Core is a fully pipelined colour-space converter that converts pixels between the RGB and YCbCr colour spaces.
UART ,is a soft Core of a Universal Asynchronous Receiver/Transmitter (UART) functionally, identical to the TL16C450.
USB2.0 Host controller using xHCI for High Performance
GDA’s USB 2.0 Host controller is a configurable core and implements the USB 2.0 Host functionality that can be interfaced with th…
Certified USB2.0 Device Controller
GDA’s USB 2.0 Device controller is a configurable core and implements the USB 2.0 Device functionality that can be interfaced wit…
100 dB of SNR, 24-bit multichannel audio CODEC with embedded regulator and high CMRR
Today s market for automotive infotainment applications has become a key challenge for car makers which require optimal vocal com…
USB 1.1/2.0 full speed USB PHY
T25201 is a and high integrated USB 2.0 low speed and full speed transceiver implementing the physical layer of a USB compliant d…
SATA 3 Host Controller on ZYNQ
The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA.
Aurora-like 64b/66b @14Gbps for ALTERA Devices
REFLEX CES introduces a release at 14Gbps of its Aurora-like IP Core based on ALTERA FPGA enabling interoperability between XILIN…
1024 State 3GPP2 Viterbi Decoder
The VA10V is a 1024 state error control decoder using the maximum likelihood Viterbi algorithm.
80mA 3.3 to 1.8V Capless Voltage regulator - SMIC 0.18um
3.3V to 1.8V voltage regulator up to 80mA requiring no external capacitor.
20mA 3.3 to 1.8V Capless Voltage regulator - SMIC 0.18um
3.3V to 1.8V voltage regulator up to 20mA requiring no external capacitor.
150mA 3.3V to 1.8V regulator - SMIC 0.18um
3.3V to 1.8V linear voltage regulator for up to 150mA.
Ultra low power Voltage regulator - UMC 0.13um
The cell is a ultra low power series 3.3V to 1.2V voltage regulator.
High Precision RC Oscillator - UMC 0.18um
Fully integrated 4MHz to 256MHz High Precision RC Oscillator
RC oscillator 50MHz-100MHz - SMIC 0.18um
Fully integrated calibrated RC oscillator
LVDS transmitter - TowerJazz 0.13um
LVDS transmitter
LVDS receiver - TowerJazz 0.13um
LVDS receiver
LVDS reference - TowerJazz 0.13um
LVDS reference
10-Bit Current steering DAC - TowerJazz 0.18um
10 bits 16MS/s current steering DAC.