UMC L28HLP 28nm Spread Spectrum PLL - 384MHz-1920MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
- UMC
- 28nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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UMC L28HLP 28nm Spread Spectrum PLL - 384MHz-1920MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HPM 28nm Spread Spectrum PLL - 150MHz-750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HPM 28nm Spread Spectrum PLL - 300MHz-1500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HPM 28nm Spread Spectrum PLL - 600MHz-3000MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HLP 28nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
UMC L28HPM 28nm General Purpose PLL - 350MHz-1750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN80GC 80nm General Purpose PLL - 160MHz-800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN80GT 80nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN80HS 80nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
UMC L28HLP 28nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HLP 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HLP 28nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HPM 28nm Deskew PLL - 175MHz-875MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HPM 28nm Deskew PLL - 350MHz-1750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HPM 28nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HLP 28nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
UMC L28HLP 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
UMC L28HLP 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
UMC L28HPM 28nm Clock Generator PLL - 175MHz-875MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
UMC L28HPM 28nm Clock Generator PLL - 350MHz-1750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.