MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC N3E 1.2V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 3nm
- N3E