Synopsys, Inc.
•
HQ:
USA
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 6nm
- N6FF
Compare 420 Display Controller IP Listing from 41 vendors
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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 12nm
- FFC
-
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 12nm
- FFC
-
MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC N7 1.8V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 7nm
- N7
-
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC N7 1.8V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 7nm
- N7
-
Synopsys, Inc.• HQ: USA
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 7nm
- N7
-
Synopsys, Inc.• HQ: USA
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 7nm
- N7
-
Synopsys, Inc.• HQ: USA
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 7nm
- N7
-
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC N6 1.8V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 6nm
- N6
-
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes - TSMC N6 1.8V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 6nm
- N6
-
Synopsys, Inc.• HQ: USA
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 5nm
- N5A
-
Synopsys, Inc.• HQ: USA
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 5nm
- N5A
-
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC N5 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
-
MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes - TSMC N5 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
-
MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes - TSMC N5 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
-
MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes -TSMC N3P 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 3nm
- N3P
-
MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC N3P 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 3nm
- N3P
-
MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes - TSMC N3P 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 3nm
- N3P
-
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC N3E 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 3nm
- N3E
-
MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes -TSMC N3E 1.2V, North/South Poly Orientation
Synopsys, Inc.• HQ: USAThe integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 3nm
- N3E