GSM Equalizer/Demodulator and SCH Decoder
Single channel GSM equalizer/demodulator + SCH decoder
- Modulation Demodulation
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
GSM Equalizer/Demodulator and SCH Decoder
Single channel GSM equalizer/demodulator + SCH decoder
GSM scanner for identifying and decoding broadcast channels
Wideband polyphase channelizer/resampler supporting up to 128 contiguous GSM channels
L1 GPS + Glonass + Galileo + Beidou receiver + fractional-N synthesizer
The GNSS IP solutions support GPS, Glonass, Galileo, and Beidou constellations across L1, L2, and L5 bands.
GPS receiver with fractional-N synthesizer (L1)
The GNSS IP solutions support GPS, Glonass, Galileo, and Beidou constellations across L1, L2, and L5 bands.
The SDR transceiver IP provides wideband, programmable RF front-ends for multi-standard wireless platforms.
UE LTE (Cat-0 – Cat-5) / 3G wideband transceiver for flexible SDR pipelines, 400 MHz – 2.8 GHz.
The SDR transceiver IP provides wideband, programmable RF front-ends for multi-standard wireless platforms.
Wideband 2×2 MIMO transceiver, 400 MHz – 3.6 GHz, suitable for SDR-style eNodeB designs.
The SDR transceiver IP provides wideband, programmable RF front-ends for multi-standard wireless platforms.
11-bit 2-channel (I/Q) current-mode DAC, 640 MHz, 2.7 mW, SNDR 63 dB
The data converter IP portfolio includes low-power SAR ADCs, flash ADCs, and high-speed I/Q DACs optimized for RF and baseband pa…
10-bit 2-channel (I/Q) SAR ADC, 160 MHz, 8 mW per channel, SNDR 53 dB
The data converter IP portfolio includes low-power SAR ADCs, flash ADCs, and high-speed I/Q DACs optimized for RF and baseband pa…
2.4 GHz + sub-GHz 802.15.4g + 802.11ah transceiver for Wi-SUN and IoT platforms
SaberTek offers compact, low-power Wi-Fi 802.11ax transceiver IP with optional integrated BLE and sub-GHz support for multi-proto…
UMC 0.35um embedded HV Process 3.3V Crystal Low Frequency IO library
UMC 0.35um embedded HV Process 3.3V Crystal Low Frequency IO library
UMC 0.35um embedded HV Process 3.3V Crystal IO library
UMC 0.35um embedded HV Process 3.3V Crystal IO library
UMC 0.162um eHV 3.3V/8.25V/16.5V Process Standard IO Library
UMC 0.162um eHV 3.3V/8.25V/16.5V Process Standard IO Library
IP
I/O:Ultra Small Size Dup-Pad total solution
IP
I/O:Ultra Small Size Dup-Pad total solution
IP
IP
Ultra-low power and low jitter PLL
IP
IP