VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is a leading public company that provides custom silicon solutions, leveraging its comprehensive and proprietary portfolio of semiconductor IPs.
VeriSilicon possesses six categories of in-house processing IPs, namely Graphics Processing Unit (GPU) IP, Neural Network Processing Unit (NPU) IP, Video Processing Unit (VPU) IP, Digital Signal Processing (DSP) IP, Image Signal Processing (ISP) IP, and Display Processing IP, as well as more than 1,700 analog and mixed-signal IPs, RF IPs, and interface IPs.
Leveraging its own IPs, VeriSilicon has developed a wealth of software and hardware custom chip design platforms targeting Artificial Intelligence (AI) applications, covering always-on ultralight spatial computing devices such as smartwatches and AI/AR glasses, high-efficiency edge computing devices such as AI PCs, AI phones, smart cars, and robots, as well as high-performance cloud computing devices like data centers and servers.
In response to the trend of System-on-Chip (SoC) evolving towards System-in-Package (SiP) driven by the demand for large computing power, VeriSilicon put forward the concepts of "IP as a Chiplet”, "Chiplet as a Platform", and "Platform as an Ecosystem”. The company keeps advancing the R&D and industrialization of its Chiplet technologies and projects from the perspective of interface IP, Chiplet architecture, advanced packaging technology, and others for AI-Generated Content (AIGC) and autonomous driving solutions.
Under its unique “Silicon Platform as a Service” (SiPaaS) business model, VeriSilicon serves a broad range of market segments, including consumer electronics, automotive electronics, computer and peripheral, industrial, data processing, Internet of Things (IoT), among others. Its main customers include fabless, IDM, system vendors (OEM/ODM), large internet companies, and cloud service providers.
Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 9 design and R&D centers, along with 11 sales and customer service offices worldwide. VeriSilicon currently has more than 2,000 employees.
RISC-V-Based, Open Source AI Accelerator for the Edge
Coral NPU is a machine learning (ML) accelerator core designed for energy-efficient AI at the edge.
Auxiliary DAC - 12-bit Successive Approximation Register (SAR) DAC
This digital-to-analog converter implements segmented R-2R and thermometer decoder architecture to achieve 12-bit resolution.
The narrowband Internet of Things (NB-IoT) technology supports the Cat-NB1 standard defined by the International Organization for…
GNSS RF IP - GLOBALFOUNDRIES 22nm FDX
GF22FDSOIV08_GNSS_01 is a GNSS RF receiver which is designed to support GPS L1, Beidou B1, Galileo E1 and Glonass G1 modes.
Dual-mode Bluetooth RF IP is a 2.4 GHz ISM band RF transceiver IP designed for Bluetooth dual-mode applications.
The Bluetooth Low Energy (BLE) technology supports the BLE standard defined by the International Standards Organization SIG, incl…
802.11ah IP - GLOBALFOUNDRIES 22nm FDX
The 802.11ah IP is a radio transceiver working on 863M~928MHz ISM frequency band.
This IP is a C-PHY/D-PHY Combo RX IP which can be flexibly configured as Slave D-PHY or C-PHY.
This IP is a C/D Combo PHY TX IP which can be flexibly configured as Master D-PHY or C-PHY.
This is a D-PHY RX IP compliant with the “MIPI Alliance Spec for D-PHY v1.2”.
This is a D-PHY Master IP compliant with the “MIPI Alliance Spec for D-PHY v1.2”.
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1/v1.2”, which consists of Bi-directional 1-Clock and 4-Data …
This Video DAC specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which …
Video ADC - 12-bit Successive Approximation Register (SAR) ADC
The analog-to-digital converter is a differential high speed low power IP which uses Successive Approximation Register (SAR) arch…
This audio codec integrates 2-channel 24-bit sigma-delta ADCs and 2-channel 24-bit sigma-delta DACs, and fractional audio PLL to …
Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC
This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
Hantro VC9000E enables 8K encoding with a competitive PPA and high video quality single-core solution supporting AV1, HEVC, H.264…
Long reach SerDes for Automotive Sensor and Display Applications
Long Reach SerDes for Automotive Sensor and Display Applications
USB 3.2 and DP 1.4 TX Combo PHY
This IP is a USB 3.2 and DP combo PHY which can be flexibly configured as USB mode and DP mode.