UCIe and BOW Universal PHY
The core idea behind the Universal PHY is to enable open chiplets for a broad range of applications.
Overview
The core idea behind the Universal PHY is to enable open chiplets for a broad range of applications. One chiplet for a wide range of packaging and end applications. The PHY is protocol compliant with UCIe-S, UCIe-A and UCIe-3D. But uses unique bump map design and architecture.
The Universal PHY is patent pending, and more details can be provided under NDA.
Key features
- Novel Redundancy for Hi-Rel,
- Support for 16&18-bit wide data,
- Support Synchronous Operation,
- Supports Advanced packaging,
- Support Control Data Signalling,
- Configurable no-clock option.
Block Diagram
Specifications
Identity
Provider
Learn more about BOW IP core
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Frequently asked questions about BoW IP cores
What is UCIe and BOW Universal PHY?
UCIe and BOW Universal PHY is a BOW IP core from YorChip Inc listed on Semi IP Hub.
How should engineers evaluate this BOW?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this BOW IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.